- U-Boot SPL 2013.10-00146-g562aa88 (Dec 17 2013 - 09:28:00)
- SPL: Please implement spl_start_uboot() for your board
- SPL: Direct Linux boot not active!
- reading u-boot.img
- reading u-boot.img
- U-Boot 2013.10-00146-g562aa88 (Dec 17 2013 - 09:28:00)
- I2C: ready
- DRAM: 1 GiB
- NAND: 512 MiB
- MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
- *** Warning - bad CRC, using default environment
- Net: <ethaddr> not set. Validating first E-fuse MAC
- cpsw
- Hit any key to stop autoboot: 3 2 1 0
- (Re)start USB...
- USB0: Register 2000440 NbrPorts 2
- Starting the controller
- USB XHCI 1.00
- scanning bus 0 for devices... 1 USB Device(s) found
- scanning usb for storage devices... 0 Storage Device(s) found
- USB device 0: unknown device
- mmc0 is current device
- Scanning mmc 0...
- 4542304 bytes read in 268 ms (16.2 MiB/s)
- 25818 bytes read in 38 ms (663.1 KiB/s)
- mmc0 is current device
- SD/MMC found on device 0
- reading uEnv.txt
- ** Unable to read file uEnv.txt **
- 4542304 bytes read in 268 ms (16.2 MiB/s)
- 25818 bytes read in 38 ms (663.1 KiB/s)
- Booting from mmc0 ...
- Kernel image @ 0x80200000 [ 0x000000 - 0x454f60 ]
- ## Flattened Device Tree blob at 80f80000
- Booting using the fdt blob at 0x80f80000
- Loading Device Tree to 9fff6000, end 9ffff4d9 ... OK
- Starting kernel ...
- [ 0.000000] Booting Linux on physical CPU 0x0
- [ 0.000000] Linux version 3.13.0-rc8-00219-gff4f3eb (suman@Irmo) (gcc version 4.6.3 (Sourcery CodeBench Lite 2012.03-57) ) #1 SMP Mon Jan 13 13:57:34 CST 2014
- [ 0.000000] CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d
- [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
- [ 0.000000] Machine model: TI AM43x EPOS EVM
- [ 0.000000] cma: CMA: reserved 16 MiB at ae800000
- [ 0.000000] Memory policy: Data cache writeback
- [ 0.000000] CPU: All CPU(s) started in SVC mode.
- [ 0.000000] PERCPU: Embedded 9 pages/cpu @c163d000 s13952 r8192 d14720 u36864
- [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260624
- [ 0.000000] Kernel command line: console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
- [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
- [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
- [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
- [ 0.000000] Memory: 1008528K/1048576K available (5877K kernel code, 600K rwdata, 2076K rodata, 341K init, 5527K bss, 40048K reserved, 270336K highmem)
- [ 0.000000] Virtual kernel memory layout:
- [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
- [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
- [ 0.000000] vmalloc : 0xf0000000 - 0xff000000 ( 240 MB)
- [ 0.000000] lowmem : 0xc0000000 - 0xef800000 ( 760 MB)
- [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
- [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
- [ 0.000000] .text : 0xc0008000 - 0xc07cca54 (7955 kB)
- [ 0.000000] .init : 0xc07cd000 - 0xc0822680 ( 342 kB)
- [ 0.000000] .data : 0xc0824000 - 0xc08ba100 ( 601 kB)
- [ 0.000000] .bss : 0xc08ba100 - 0xc0e1fd28 (5528 kB)
- [ 0.000000] Hierarchical RCU implementation.
- [ 0.000000] RCU restricting CPUs from NR_CPUS=2 to nr_cpu_ids=1.
- [ 0.000000] NR_IRQS:16 nr_irqs:16 16
- [ 0.000000] GIC CPU mask not found - kernel will fail to boot.
- [ 0.000000] GIC CPU mask not found - kernel will fail to boot.
- [ 0.000000] OMAP clockevent source: timer1 at 25180 Hz
- [ 0.000000] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 65536000000000ns
- [ 0.000000] OMAP clocksource: 32k_counter at 32768 Hz
- [ 0.000000] Console: colour dummy device 80x30
- [ 0.000000] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
- [ 0.000000] ... MAX_LOCKDEP_SUBCLASSES: 8
- [ 0.000000] ... MAX_LOCK_DEPTH: 48
- [ 0.000000] ... MAX_LOCKDEP_KEYS: 8191
- [ 0.000000] ... CLASSHASH_SIZE: 4096
- [ 0.000000] ... MAX_LOCKDEP_ENTRIES: 16384
- [ 0.000000] ... MAX_LOCKDEP_CHAINS: 32768
- [ 0.000000] ... CHAINHASH_SIZE: 16384
- [ 0.000000] memory used by lock dependency info: 3695 kB
- [ 0.000000] per task-struct memory footprint: 1152 bytes
- [ 0.001525] Calibrating delay loop... 990.41 BogoMIPS (lpj=4952064)
- [ 0.113952] pid_max: default: 32768 minimum: 301
- [ 0.114593] Security Framework initialized
- [ 0.114837] Mount-cache hash table entries: 512
- [ 0.135437] CPU: Testing write buffer coherency: ok
- [ 0.137908] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
- [ 0.138000] Setting up static identity map for 0x80595180 - 0x805951f0
- [ 0.145050] Brought up 1 CPUs
- [ 0.145080] SMP: Total of 1 processors activated.
- [ 0.145080] CPU: All CPU(s) started in SVC mode.
- [ 0.150512] devtmpfs: initialized
- [ 0.171081] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
- [ 0.195526] ------------[ cut here ]------------
- [ 0.195587] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2434 _init+0x1c0/0x3dc()
- [ 0.195587] omap_hwmod: qspi: doesn't have mpu register target base
- [ 0.195617] Modules linked in:
- [ 0.195648] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.13.0-rc8-00219-gff4f3eb #1
- [ 0.195709] [<c0015fb8>] (unwind_backtrace+0x0/0xf0) from [<c00129b4>] (show_stack+0x10/0x14)
- [ 0.195770] [<c00129b4>] (show_stack+0x10/0x14) from [<c0589c64>] (dump_stack+0x70/0x8c)
- [ 0.195800] [<c0589c64>] (dump_stack+0x70/0x8c) from [<c0040e94>] (warn_slowpath_common+0x6c/0x8c)
- [ 0.195831] [<c0040e94>] (warn_slowpath_common+0x6c/0x8c) from [<c0040f48>] (warn_slowpath_fmt+0x30/0x40)
- [ 0.195861] [<c0040f48>] (warn_slowpath_fmt+0x30/0x40) from [<c07d8128>] (_init+0x1c0/0x3dc)
- [ 0.195892] [<c07d8128>] (_init+0x1c0/0x3dc) from [<c0029508>] (omap_hwmod_for_each+0x34/0x5c)
- [ 0.195922] [<c0029508>] (omap_hwmod_for_each+0x34/0x5c) from [<c07d88ac>] (__omap_hwmod_setup_all+0x24/0x40)
- [ 0.195953] [<c07d88ac>] (__omap_hwmod_setup_all+0x24/0x40) from [<c0008a64>] (do_one_initcall+0x34/0x164)
- [ 0.195983] [<c0008a64>] (do_one_initcall+0x34/0x164) from [<c07cdbe8>] (kernel_init_freeable+0xfc/0x1c8)
- [ 0.196014] [<c07cdbe8>] (kernel_init_freeable+0xfc/0x1c8) from [<c0584d7c>] (kernel_init+0x8/0x110)
- [ 0.196044] [<c0584d7c>] (kernel_init+0x8/0x110) from [<c000ec48>] (ret_from_fork+0x14/0x2c)
- [ 0.196258] ---[ end trace 189c622739ca299e ]---
- [ 0.225036] omap_hwmod: tptc0 using broken dt data from edma
- [ 0.225524] omap_hwmod: tptc1 using broken dt data from edma
- [ 0.225982] omap_hwmod: tptc2 using broken dt data from edma
- [ 0.232757] ------------[ cut here ]------------
- [ 0.232818] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2434 _init+0x1c0/0x3dc()
- [ 0.232849] omap_hwmod: usb_otg_ss0: doesn't have mpu register target base
- [ 0.232849] Modules linked in:
- [ 0.232879] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 3.13.0-rc8-00219-gff4f3eb #1
- [ 0.232971] [<c0015fb8>] (unwind_backtrace+0x0/0xf0) from [<c00129b4>] (show_stack+0x10/0x14)
- [ 0.233001] [<c00129b4>] (show_stack+0x10/0x14) from [<c0589c64>] (dump_stack+0x70/0x8c)
- [ 0.233062] [<c0589c64>] (dump_stack+0x70/0x8c) from [<c0040e94>] (warn_slowpath_common+0x6c/0x8c)
- [ 0.233093] [<c0040e94>] (warn_slowpath_common+0x6c/0x8c) from [<c0040f48>] (warn_slowpath_fmt+0x30/0x40)
- [ 0.233123] [<c0040f48>] (warn_slowpath_fmt+0x30/0x40) from [<c07d8128>] (_init+0x1c0/0x3dc)
- [ 0.233154] [<c07d8128>] (_init+0x1c0/0x3dc) from [<c0029508>] (omap_hwmod_for_each+0x34/0x5c)
- [ 0.233184] [<c0029508>] (omap_hwmod_for_each+0x34/0x5c) from [<c07d88ac>] (__omap_hwmod_setup_all+0x24/0x40)
- [ 0.233215] [<c07d88ac>] (__omap_hwmod_setup_all+0x24/0x40) from [<c0008a64>] (do_one_initcall+0x34/0x164)
- [ 0.233245] [<c0008a64>] (do_one_initcall+0x34/0x164) from [<c07cdbe8>] (kernel_init_freeable+0xfc/0x1c8)
- [ 0.233276] [<c07cdbe8>] (kernel_init_freeable+0xfc/0x1c8) from [<c0584d7c>] (kernel_init+0x8/0x110)
- [ 0.233337] [<c0584d7c>] (kernel_init+0x8/0x110) from [<c000ec48>] (ret_from_fork+0x14/0x2c)
- [ 0.233337] ---[ end trace 189c622739ca299f ]---
- [ 0.234252] ------------[ cut here ]------------
- [ 0.234283] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2434 _init+0x1c0/0x3dc()
- [ 0.234313] omap_hwmod: usb_otg_ss1: doesn't have mpu register target base
- [ 0.234313] Modules linked in:
- [ 0.234344] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 3.13.0-rc8-00219-gff4f3eb #1
- [ 0.234405] [<c0015fb8>] (unwind_backtrace+0x0/0xf0) from [<c00129b4>] (show_stack+0x10/0x14)
- [ 0.234466] [<c00129b4>] (show_stack+0x10/0x14) from [<c0589c64>] (dump_stack+0x70/0x8c)
- [ 0.234497] [<c0589c64>] (dump_stack+0x70/0x8c) from [<c0040e94>] (warn_slowpath_common+0x6c/0x8c)
- [ 0.234527] [<c0040e94>] (warn_slowpath_common+0x6c/0x8c) from [<c0040f48>] (warn_slowpath_fmt+0x30/0x40)
- [ 0.234558] [<c0040f48>] (warn_slowpath_fmt+0x30/0x40) from [<c07d8128>] (_init+0x1c0/0x3dc)
- [ 0.234588] [<c07d8128>] (_init+0x1c0/0x3dc) from [<c0029508>] (omap_hwmod_for_each+0x34/0x5c)
- [ 0.234619] [<c0029508>] (omap_hwmod_for_each+0x34/0x5c) from [<c07d88ac>] (__omap_hwmod_setup_all+0x24/0x40)
- [ 0.234649] [<c07d88ac>] (__omap_hwmod_setup_all+0x24/0x40) from [<c0008a64>] (do_one_initcall+0x34/0x164)
- [ 0.234680] [<c0008a64>] (do_one_initcall+0x34/0x164) from [<c07cdbe8>] (kernel_init_freeable+0xfc/0x1c8)
- [ 0.234710] [<c07cdbe8>] (kernel_init_freeable+0xfc/0x1c8) from [<c0584d7c>] (kernel_init+0x8/0x110)
- [ 0.234741] [<c0584d7c>] (kernel_init+0x8/0x110) from [<c000ec48>] (ret_from_fork+0x14/0x2c)
- [ 0.234771] ---[ end trace 189c622739ca29a0 ]---
- [ 0.289367] pinctrl core: initialized pinctrl subsystem
- [ 0.297149] regulator-dummy: no parameters
- [ 0.303894] NET: Registered protocol family 16
- [ 0.310760] DMA: preallocated 256 KiB pool for atomic coherent allocations
- [ 0.348510] platform 49000000.edma: alias fck already exists
- [ 0.348571] platform 49000000.edma: alias fck already exists
- [ 0.348602] platform 49000000.edma: alias fck already exists
- [ 0.361846] OMAP GPIO hardware version 0.1
- [ 0.388702] platform 53701000.des: Cannot lookup hwmod 'des'
- [ 0.393981] No ATAGs?
- [ 0.394042] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
- [ 0.394073] hw-breakpoint: maximum watchpoint size is 4 bytes.
- [ 0.553405] bio: create slab <bio-0> at 0
- [ 0.644989] edma-dma-engine edma-dma-engine.0: TI EDMA DMA engine driver
- [ 0.648498] vmmcsd_fixed: 3300 mV
- [ 0.665069] SCSI subsystem initialized
- [ 0.670715] usbcore: registered new interface driver usbfs
- [ 0.671875] usbcore: registered new interface driver hub
- [ 0.674285] usbcore: registered new device driver usb
- [ 0.681457] omap_i2c 44e0b000.i2c: could not find pctldev for node /pinmux@44e10800/pinmux_i2c0_pins, deferring probe
- [ 0.681549] platform 44e0b000.i2c: Driver omap_i2c requests probe deferral
- [ 0.698059] Switched to clocksource 32k_counter
- [ 0.963806] NET: Registered protocol family 2
- [ 0.967224] TCP established hash table entries: 8192 (order: 3, 32768 bytes)
- [ 0.967864] TCP bind hash table entries: 8192 (order: 6, 294912 bytes)
- [ 0.971099] TCP: Hash tables configured (established 8192 bind 8192)
- [ 0.971557] TCP: reno registered
- [ 0.971649] UDP hash table entries: 512 (order: 3, 40960 bytes)
- [ 0.972106] UDP-Lite hash table entries: 512 (order: 3, 40960 bytes)
- [ 0.974365] NET: Registered protocol family 1
- [ 0.977813] RPC: Registered named UNIX socket transport module.
- [ 0.977874] RPC: Registered udp transport module.
- [ 0.977874] RPC: Registered tcp transport module.
- [ 0.977905] RPC: Registered tcp NFSv4.1 backchannel transport module.
- [ 1.176422] bounce pool size: 64 pages
- [ 1.179351] VFS: Disk quotas dquot_6.5.2
- [ 1.179718] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
- [ 1.184112] NFS: Registering the id_resolver key type
- [ 1.184997] Key type id_resolver registered
- [ 1.185028] Key type id_legacy registered
- [ 1.185394] jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc.
- [ 1.186187] msgmni has been set to 1473
- [ 1.195251] io scheduler noop registered
- [ 1.195312] io scheduler deadline registered
- [ 1.195404] io scheduler cfq registered (default)
- [ 1.200622] pinctrl-single 44e10800.pinmux: 199 pins at pa f9e10800 size 796
- [ 1.209442] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
- [ 1.223876] omap_uart 44e09000.serial: No clock speed specified: using default: 48000000
- [ 1.226257] 44e09000.serial: ttyO0 at MMIO 0x44e09000 (irq = 104, base_baud = 3000000) is a OMAP UART0
- [ 2.224822] console [ttyO0] enabled
- [ 2.294525] brd: module loaded
- [ 2.334747] loop: module loaded
- [ 2.352294] mtdoops: mtd device (mtddev=name/number) must be supplied
- [ 2.379425] usbcore: registered new interface driver asix
- [ 2.385803] usbcore: registered new interface driver ax88179_178a
- [ 2.393554] usbcore: registered new interface driver cdc_ether
- [ 2.400909] usbcore: registered new interface driver r815x
- [ 2.407684] usbcore: registered new interface driver smsc95xx
- [ 2.414459] usbcore: registered new interface driver net1080
- [ 2.421356] usbcore: registered new interface driver cdc_subset
- [ 2.428771] usbcore: registered new interface driver zaurus
- [ 2.435455] usbcore: registered new interface driver cdc_ncm
- [ 2.445587] usbcore: registered new interface driver cdc_wdm
- [ 2.452545] usbcore: registered new interface driver usb-storage
- [ 2.460174] usbcore: registered new interface driver usbtest
- [ 2.471771] mousedev: PS/2 mouse device common for all mice
- [ 2.488555] i2c /dev entries driver
- [ 2.493011] Driver for 1-wire Dallas network protocol.
- [ 2.509613] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec
- [ 2.524200] edma-dma-engine edma-dma-engine.0: allocated channel for 0:25
- [ 2.531280] edma-dma-engine edma-dma-engine.0: allocated channel for 0:24
- [ 2.538940] 48060000.mmc supply vmmc_aux not found, using dummy regulator
- [ 2.546173] omap_hsmmc 48060000.mmc: pins are not configured from the driver
- [ 2.601379] usbcore: registered new interface driver usbhid
- [ 2.606964] usbhid: USB HID core driver
- [ 2.615875] oprofile: no performance counters
- [ 2.625000] oprofile: using timer interrupt.
- [ 2.630920] TCP: cubic registered
- [ 2.634216] Initializing XFRM netlink socket
- [ 2.638793] NET: Registered protocol family 17
- [ 2.643280] NET: Registered protocol family 15
- [ 2.648437] Key type dns_resolver registered
- [ 2.656646] ThumbEE CPU extension supported.
- [ 2.690307] omap_i2c 44e0b000.i2c: bus 0 rev0.12 at 100 kHz
- [ 2.698791] mmc0: host does not support reading read-only switch. assuming write-enable.
- [ 2.725769] mmc0: new high speed SDHC card at address 1234
- [ 2.736145] isa bounce pool size: 16 pages
- [ 2.742279] mmcblk0: mmc0:1234 SA04G 3.63 GiB
- [ 2.757385] mmcblk0: p1 p2
- [ 2.787719] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6
- [ 2.793701] davinci_mdio 4a101000.mdio: detected phy mask fffeffff
- [ 2.804656] libphy: 4a101000.mdio: probed
- [ 2.808837] davinci_mdio 4a101000.mdio: phy[16]: device 4a101000.mdio:10, driver unknown
- [ 2.817230] Detected MACID = e2:42:37:0f:00:10
- [ 2.832794] drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
- [ 2.870544] omap_uart 44e09000.serial: no wakeirq for uart0
- [ 9.283691] EXT4-fs (mmcblk0p2): recovery complete
- [ 9.294128] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
- [ 9.302490] VFS: Mounted root (ext4 filesystem) on device 179:2.
- [ 9.324829] devtmpfs: mounted
- [ 9.328521] Freeing unused kernel memory: 340K (c07cd000 - c0822000)
- bb-ml login: root
- login[620]: root login on 'ttyO0'
- ~ #
- ~ #
- ~ # catlsmod
- ~ #
- ~ # cat /bin/hw~ # cat /bin/hwlock_multi
- #!/bin/sh
- # Run test multiple times
- #
- #insmod /rpmsg/hwspinlock_core.ko
- for i in `seq 1 50`
- do
- echo "Probe # " $i
- insmod /rpmsg/hwspinlock_core.ko
- insmod /rpmsg/omap_hwspinlock.ko
- lsmod
- echo "Release # " $i
- rmmod omap_hwspinlock
- rmmod hwspinlock_core
- done
- #rmmod hwspinlock_core
- ~ #
- ~ #
- ~ # hwlo~ # hwlock_multi
- Probe # 1
- omap_hwspinlock 2500 0 - Live 0xbf007000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf000000
- Release # 1
- Probe # 2
- omap_hwspinlock 2500 0 - Live 0xbf012000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf00b000
- Release # 2
- Probe # 3
- omap_hwspinlock 2500 0 - Live 0xbf01d000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf016000
- Release # 3
- Probe # 4
- omap_hwspinlock 2500 0 - Live 0xbf028000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf021000
- Release # 4
- Probe # 5
- omap_hwspinlock 2500 0 - Live 0xbf033000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf02c000
- Release # 5
- Probe # 6
- omap_hwspinlock 2500 0 - Live 0xbf03e000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf037000
- Release # 6
- Probe # 7
- omap_hwspinlock 2500 0 - Live 0xbf049000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf042000
- Release # 7
- Probe # 8
- omap_hwspinlock 2500 0 - Live 0xbf054000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf04d000
- Release # 8
- Probe # 9
- omap_hwspinlock 2500 0 - Live 0xbf05f000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf058000
- Release # 9
- Probe # 10
- omap_hwspinlock 2500 0 - Live 0xbf06a000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf063000
- Release # 10
- Probe # 11
- omap_hwspinlock 2500 0 - Live 0xbf075000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf06e000
- Release # 11
- Probe # 12
- omap_hwspinlock 2500 0 - Live 0xbf080000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf079000
- Release # 12
- Probe # 13
- omap_hwspinlock 2500 0 - Live 0xbf08b000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf084000
- Release # 13
- Probe # 14
- omap_hwspinlock 2500 0 - Live 0xbf096000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf08f000
- Release # 14
- Probe # 15
- omap_hwspinlock 2500 0 - Live 0xbf0a1000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf09a000
- Release # 15
- Probe # 16
- omap_hwspinlock 2500 0 - Live 0xbf0ac000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf0a5000
- Release # 16
- Probe # 17
- omap_hwspinlock 2500 0 - Live 0xbf0b7000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf0b0000
- Release # 17
- Probe # 18
- omap_hwspinlock 2500 0 - Live 0xbf0c2000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf0bb000
- Release # 18
- Probe # 19
- omap_hwspinlock 2500 0 - Live 0xbf0cd000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf0c6000
- Release # 19
- Probe # 20
- omap_hwspinlock 2500 0 - Live 0xbf0d8000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf0d1000
- Release # 20
- Probe # 21
- omap_hwspinlock 2500 0 - Live 0xbf0e3000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf0dc000
- Release # 21
- Probe # 22
- omap_hwspinlock 2500 0 - Live 0xbf0ee000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf0e7000
- Release # 22
- Probe # 23
- omap_hwspinlock 2500 0 - Live 0xbf0f9000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf0f2000
- Release # 23
- Probe # 24
- omap_hwspinlock 2500 0 - Live 0xbf104000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf0fd000
- Release # 24
- Probe # 25
- omap_hwspinlock 2500 0 - Live 0xbf10f000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf108000
- Release # 25
- Probe # 26
- omap_hwspinlock 2500 0 - Live 0xbf11a000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf113000
- Release # 26
- Probe # 27
- omap_hwspinlock 2500 0 - Live 0xbf125000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf11e000
- Release # 27
- Probe # 28
- omap_hwspinlock 2500 0 - Live 0xbf130000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf129000
- Release # 28
- Probe # 29
- omap_hwspinlock 2500 0 - Live 0xbf13b000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf134000
- Release # 29
- Probe # 30
- omap_hwspinlock 2500 0 - Live 0xbf146000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf13f000
- Release # 30
- Probe # 31
- omap_hwspinlock 2500 0 - Live 0xbf151000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf14a000
- Release # 31
- Probe # 32
- omap_hwspinlock 2500 0 - Live 0xbf15c000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf155000
- Release # 32
- Probe # 33
- omap_hwspinlock 2500 0 - Live 0xbf167000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf160000
- Release # 33
- Probe # 34
- omap_hwspinlock 2500 0 - Live 0xbf172000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf16b000
- Release # 34
- Probe # 35
- omap_hwspinlock 2500 0 - Live 0xbf17d000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf176000
- Release # 35
- Probe # 36
- omap_hwspinlock 2500 0 - Live 0xbf188000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf181000
- Release # 36
- Probe # 37
- omap_hwspinlock 2500 0 - Live 0xbf193000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf18c000
- Release # 37
- Probe # 38
- omap_hwspinlock 2500 0 - Live 0xbf19e000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf197000
- Release # 38
- Probe # 39
- omap_hwspinlock 2500 0 - Live 0xbf1a9000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf1a2000
- Release # 39
- Probe # 40
- omap_hwspinlock 2500 0 - Live 0xbf1b4000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf1ad000
- Release # 40
- Probe # 41
- [ 27.125549] random: nonblocking pool is initialized
- omap_hwspinlock 2500 0 - Live 0xbf1bf000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf1b8000
- Release # 41
- Probe # 42
- omap_hwspinlock 2500 0 - Live 0xbf1ca000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf1c3000
- Release # 42
- Probe # 43
- omap_hwspinlock 2500 0 - Live 0xbf1d5000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf1ce000
- Release # 43
- Probe # 44
- omap_hwspinlock 2500 0 - Live 0xbf1e0000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf1d9000
- Release # 44
- Probe # 45
- omap_hwspinlock 2500 0 - Live 0xbf1eb000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf1e4000
- Release # 45
- Probe # 46
- omap_hwspinlock 2500 0 - Live 0xbf1f6000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf1ef000
- Release # 46
- Probe # 47
- omap_hwspinlock 2500 0 - Live 0xbf201000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf1fa000
- Release # 47
- Probe # 48
- omap_hwspinlock 2500 0 - Live 0xbf20c000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf205000
- Release # 48
- Probe # 49
- omap_hwspinlock 2500 0 - Live 0xbf217000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf210000
- Release # 49
- Probe # 50
- omap_hwspinlock 2500 0 - Live 0xbf222000
- hwspinlock_core 9346 1 omap_hwspinlock, Live 0xbf21b000
- Release # 50
- ~ #
- ~ #
- ~ # lsmod
- ~ #
- ~ # cd /rp~ # cd /rpmsg/
- /rpmsg # insmod hw/rpmsg # insmod hwspinlock_core.ko
- /rpmsg # insmod om/rpmsg # insmod omap_hwspinlock./rpmsg # insmod omap_hwspinlock.ko
- /rpmsg # insmod om/rpmsg # insmod omap_hwspinlock_te/rpmsg # insmod omap_hwspinlock_test.ko
- [ 44.305664]
- [ 44.305664] ***** Begin - Test All pHandle Locks ****
- [ 44.312316] Number of phandles = 2
- [ 44.316009]
- [ 44.316009] Testing lock 3
- [ 44.320709] trylock #1 status[0] = 0
- [ 44.324218] trylock #2 status[0] = -16
- [ 44.328063] trylock after unlock status[0] = 0
- [ 44.332397] trylock #1 status[1] = 0
- [ 44.335937] trylock #2 status[1] = -16
- [ 44.339721] trylock after unlock status[1] = 0
- [ 44.344940]
- [ 44.344940] Testing lock 9
- [ 44.349212] trylock #1 status[0] = 0
- [ 44.352722] trylock #2 status[0] = -16
- [ 44.356414] trylock after unlock status[0] = 0
- [ 44.360870] trylock #1 status[1] = 0
- [ 44.364379] trylock #2 status[1] = -16
- [ 44.368133] trylock after unlock status[1] = 0
- [ 44.372497]
- [ 44.372497] ***** End - Test All pHandle Locks ****
- [ 44.378814]
- [ 44.378814] ***** Begin - Test All Locks ****
- [ 44.384552]
- [ 44.384552] Testing lock 0
- [ 44.388763] trylock #1 status[0] = 0
- [ 44.392272] trylock #2 status[0] = -16
- [ 44.395965] trylock after unlock status[0] = 0
- [ 44.400451] trylock #1 status[1] = 0
- [ 44.403961] trylock #2 status[1] = -16
- [ 44.407714] trylock after unlock status[1] = 0
- [ 44.412109]
- [ 44.412109] Testing lock 1
- [ 44.416229] trylock #1 status[0] = 0
- [ 44.419860] trylock #2 status[0] = -16
- [ 44.423522] trylock after unlock status[0] = 0
- [ 44.427978] trylock #1 status[1] = 0
- [ 44.431488] trylock #2 status[1] = -16
- [ 44.435150] trylock after unlock status[1] = 0
- [ 44.439605]
- [ 44.439605] Testing lock 2
- [ 44.443725] trylock #1 status[0] = 0
- [ 44.447235] trylock #2 status[0] = -16
- [ 44.450988] trylock after unlock status[0] = 0
- [ 44.455352] trylock #1 status[1] = 0
- [ 44.458953] trylock #2 status[1] = -16
- [ 44.462615] trylock after unlock status[1] = 0
- [ 44.467010]
- [ 44.467010] Testing lock 3
- [ 44.471191] trylock #1 status[0] = 0
- [ 44.474700] trylock #2 status[0] = -16
- [ 44.478454] trylock after unlock status[0] = 0
- [ 44.482818] trylock #1 status[1] = 0
- [ 44.486328] trylock #2 status[1] = -16
- [ 44.490112] trylock after unlock status[1] = 0
- [ 44.494476]
- [ 44.494476] Testing lock 4
- [ 44.498687] trylock #1 status[0] = 0
- [ 44.502166] trylock #2 status[0] = -16
- [ 44.505859] trylock after unlock status[0] = 0
- [ 44.510314] trylock #1 status[1] = 0
- [ 44.513824] trylock #2 status[1] = -16
- [ 44.517578] trylock after unlock status[1] = 0
- [ 44.521942]
- [ 44.521942] Testing lock 5
- [ 44.526062] trylock #1 status[0] = 0
- [ 44.529663] trylock #2 status[0] = -16
- [ 44.533355] trylock after unlock status[0] = 0
- [ 44.537780] trylock #1 status[1] = 0
- [ 44.541290] trylock #2 status[1] = -16
- [ 44.544952] trylock after unlock status[1] = 0
- [ 44.549438]
- [ 44.549438] Testing lock 6
- [ 44.553527] trylock #1 status[0] = 0
- [ 44.557037] trylock #2 status[0] = -16
- [ 44.560821] trylock after unlock status[0] = 0
- [ 44.565185] trylock #1 status[1] = 0
- [ 44.568756] trylock #2 status[1] = -16
- [ 44.572448] trylock after unlock status[1] = 0
- [ 44.576843]
- [ 44.576843] Testing lock 7
- [ 44.581024] trylock #1 status[0] = 0
- [ 44.584533] trylock #2 status[0] = -16
- [ 44.588287] trylock after unlock status[0] = 0
- [ 44.592651] trylock #1 status[1] = 0
- [ 44.596160] trylock #2 status[1] = -16
- [ 44.599914] trylock after unlock status[1] = 0
- [ 44.604309]
- [ 44.604309] Testing lock 8
- [ 44.608489] trylock #1 status[0] = 0
- [ 44.611999] trylock #2 status[0] = -16
- [ 44.615692] trylock after unlock status[0] = 0
- [ 44.620147] trylock #1 status[1] = 0
- [ 44.623626] trylock #2 status[1] = -16
- [ 44.627410] trylock after unlock status[1] = 0
- [ 44.631774]
- [ 44.631774] Testing lock 9
- [ 44.635894] trylock #1 status[0] = 0
- [ 44.639495] trylock #2 status[0] = -16
- [ 44.643157] trylock after unlock status[0] = 0
- [ 44.647613] trylock #1 status[1] = 0
- [ 44.651123] trylock #2 status[1] = -16
- [ 44.654785] trylock after unlock status[1] = 0
- [ 44.659240]
- [ 44.659240] Testing lock 10
- [ 44.663421] trylock #1 status[0] = 0
- [ 44.666961] trylock #2 status[0] = -16
- [ 44.670715] trylock after unlock status[0] = 0
- [ 44.675079] trylock #1 status[1] = 0
- [ 44.678649] trylock #2 status[1] = -16
- [ 44.682342] trylock after unlock status[1] = 0
- [ 44.686737]
- [ 44.686737] Testing lock 11
- [ 44.691009] trylock #1 status[0] = 0
- [ 44.694519] trylock #2 status[0] = -16
- [ 44.698272] trylock after unlock status[0] = 0
- [ 44.702606] trylock #1 status[1] = 0
- [ 44.706146] trylock #2 status[1] = -16
- [ 44.709899] trylock after unlock status[1] = 0
- [ 44.714294]
- [ 44.714294] Testing lock 12
- [ 44.718566] trylock #1 status[0] = 0
- [ 44.722076] trylock #2 status[0] = -16
- [ 44.725769] trylock after unlock status[0] = 0
- [ 44.730194] trylock #1 status[1] = 0
- [ 44.733703] trylock #2 status[1] = -16
- [ 44.737457] trylock after unlock status[1] = 0
- [ 44.741851]
- [ 44.741851] Testing lock 13
- [ 44.746032] trylock #1 status[0] = 0
- [ 44.749633] trylock #2 status[0] = -16
- [ 44.753326] trylock after unlock status[0] = 0
- [ 44.757751] trylock #1 status[1] = 0
- [ 44.761260] trylock #2 status[1] = -16
- [ 44.764923] trylock after unlock status[1] = 0
- [ 44.769378]
- [ 44.769378] Testing lock 14
- [ 44.773559] trylock #1 status[0] = 0
- [ 44.777099] trylock #2 status[0] = -16
- [ 44.780853] trylock after unlock status[0] = 0
- [ 44.785217] trylock #1 status[1] = 0
- [ 44.788787] trylock #2 status[1] = -16
- [ 44.792480] trylock after unlock status[1] = 0
- [ 44.796875]
- [ 44.796875] Testing lock 15
- [ 44.801147] trylock #1 status[0] = 0
- [ 44.804656] trylock #2 status[0] = -16
- [ 44.808410] trylock after unlock status[0] = 0
- [ 44.812774] trylock #1 status[1] = 0
- [ 44.816284] trylock #2 status[1] = -16
- [ 44.820068] trylock after unlock status[1] = 0
- [ 44.824432]
- [ 44.824432] Testing lock 16
- [ 44.828735] trylock #1 status[0] = 0
- [ 44.832244] trylock #2 status[0] = -16
- [ 44.835937] trylock after unlock status[0] = 0
- [ 44.840393] trylock #1 status[1] = 0
- [ 44.843902] trylock #2 status[1] = -16
- [ 44.847656] trylock after unlock status[1] = 0
- [ 44.852050]
- [ 44.852050] Testing lock 17
- [ 44.856262] trylock #1 status[0] = 0
- [ 44.859863] trylock #2 status[0] = -16
- [ 44.863525] trylock after unlock status[0] = 0
- [ 44.867980] trylock #1 status[1] = 0
- [ 44.871490] trylock #2 status[1] = -16
- [ 44.875152] trylock after unlock status[1] = 0
- [ 44.879608]
- [ 44.879608] Testing lock 18
- [ 44.883789] trylock #1 status[0] = 0
- [ 44.887390] trylock #2 status[0] = -16
- [ 44.891052] trylock after unlock status[0] = 0
- [ 44.895446] trylock #1 status[1] = 0
- [ 44.899017] trylock #2 status[1] = -16
- [ 44.902709] trylock after unlock status[1] = 0
- [ 44.907104]
- [ 44.907104] Testing lock 19
- [ 44.911376] trylock #1 status[0] = 0
- [ 44.914855] trylock #2 status[0] = -16
- [ 44.918640] trylock after unlock status[0] = 0
- [ 44.923004] trylock #1 status[1] = 0
- [ 44.926513] trylock #2 status[1] = -16
- [ 44.930267] trylock after unlock status[1] = 0
- [ 44.934631]
- [ 44.934631] Testing lock 20
- [ 44.938934] trylock #1 status[0] = 0
- [ 44.942413] trylock #2 status[0] = -16
- [ 44.946136] trylock after unlock status[0] = 0
- [ 44.950561] trylock #1 status[1] = 0
- [ 44.954071] trylock #2 status[1] = -16
- [ 44.957824] trylock after unlock status[1] = 0
- [ 44.962219]
- [ 44.962219] Testing lock 21
- [ 44.966430] trylock #1 status[0] = 0
- [ 44.970001] trylock #2 status[0] = -16
- [ 44.973693] trylock after unlock status[0] = 0
- [ 44.978118] trylock #1 status[1] = 0
- [ 44.981628] trylock #2 status[1] = -16
- [ 44.985321] trylock after unlock status[1] = 0
- [ 44.989776]
- [ 44.989776] Testing lock 22
- [ 44.993988] trylock #1 status[0] = 0
- [ 44.997589] trylock #2 status[0] = -16
- [ 45.001251] trylock after unlock status[0] = 0
- [ 45.005615] trylock #1 status[1] = 0
- [ 45.009216] trylock #2 status[1] = -16
- [ 45.012878] trylock after unlock status[1] = 0
- [ 45.017364]
- [ 45.017364] Testing lock 23
- [ 45.021545] trylock #1 status[0] = 0
- [ 45.025054] trylock #2 status[0] = -16
- [ 45.028839] trylock after unlock status[0] = 0
- [ 45.033172] trylock #1 status[1] = 0
- [ 45.036712] trylock #2 status[1] = -16
- [ 45.040466] trylock after unlock status[1] = 0
- [ 45.044860]
- [ 45.044860] Testing lock 24
- [ 45.049133] trylock #1 status[0] = 0
- [ 45.052612] trylock #2 status[0] = -16
- [ 45.056335] trylock after unlock status[0] = 0
- [ 45.060760] trylock #1 status[1] = 0
- [ 45.064270] trylock #2 status[1] = -16
- [ 45.068023] trylock after unlock status[1] = 0
- [ 45.072418]
- [ 45.072418] Testing lock 25
- [ 45.076599] trylock #1 status[0] = 0
- [ 45.080200] trylock #2 status[0] = -16
- [ 45.083892] trylock after unlock status[0] = 0
- [ 45.088317] trylock #1 status[1] = 0
- [ 45.091827] trylock #2 status[1] = -16
- [ 45.095520] trylock after unlock status[1] = 0
- [ 45.099975]
- [ 45.099975] Testing lock 26
- [ 45.104156] trylock #1 status[0] = 0
- [ 45.107757] trylock #2 status[0] = -16
- [ 45.111450] trylock after unlock status[0] = 0
- [ 45.115814] trylock #1 status[1] = 0
- [ 45.119384] trylock #2 status[1] = -16
- [ 45.123077] trylock after unlock status[1] = 0
- [ 45.127532]
- [ 45.127532] Testing lock 27
- [ 45.131744] trylock #1 status[0] = 0
- [ 45.135253] trylock #2 status[0] = -16
- [ 45.139007] trylock after unlock status[0] = 0
- [ 45.143371] trylock #1 status[1] = 0
- [ 45.146881] trylock #2 status[1] = -16
- [ 45.150634] trylock after unlock status[1] = 0
- [ 45.155029]
- [ 45.155029] Testing lock 28
- [ 45.159301] trylock #1 status[0] = 0
- [ 45.162811] trylock #2 status[0] = -16
- [ 45.166503] trylock after unlock status[0] = 0
- [ 45.170928] trylock #1 status[1] = 0
- [ 45.174438] trylock #2 status[1] = -16
- [ 45.178192] trylock after unlock status[1] = 0
- [ 45.182586]
- [ 45.182586] Testing lock 29
- [ 45.186767] trylock #1 status[0] = 0
- [ 45.190368] trylock #2 status[0] = -16
- [ 45.194061] trylock after unlock status[0] = 0
- [ 45.198486] trylock #1 status[1] = 0
- [ 45.201995] trylock #2 status[1] = -16
- [ 45.205688] trylock after unlock status[1] = 0
- [ 45.210174]
- [ 45.210174] Testing lock 30
- [ 45.214355] trylock #1 status[0] = 0
- [ 45.217956] trylock #2 status[0] = -16
- [ 45.221618] trylock after unlock status[0] = 0
- [ 45.225982] trylock #1 status[1] = 0
- [ 45.229583] trylock #2 status[1] = -16
- [ 45.233245] trylock after unlock status[1] = 0
- [ 45.237701]
- [ 45.237701] Testing lock 31
- [ 45.241912] trylock #1 status[0] = 0
- [ 45.245422] trylock #2 status[0] = -16
- [ 45.249176] trylock after unlock status[0] = 0
- [ 45.253540] trylock #1 status[1] = 0
- [ 45.257080] trylock #2 status[1] = -16
- [ 45.260833] trylock after unlock status[1] = 0
- [ 45.265197]
- [ 45.265197] Testing lock 32
- [ 45.269470] trylock #1 status[0] = 0
- [ 45.272979] trylock #2 status[0] = -16
- [ 45.276672] trylock after unlock status[0] = 0
- [ 45.281127] trylock #1 status[1] = 0
- [ 45.284637] trylock #2 status[1] = -16
- [ 45.288391] trylock after unlock status[1] = 0
- [ 45.292755]
- [ 45.292755] Testing lock 33
- [ 45.296966] trylock #1 status[0] = 0
- [ 45.300567] trylock #2 status[0] = -16
- [ 45.304260] trylock after unlock status[0] = 0
- [ 45.308685] trylock #1 status[1] = 0
- [ 45.312194] trylock #2 status[1] = -16
- [ 45.315887] trylock after unlock status[1] = 0
- [ 45.320343]
- [ 45.320343] Testing lock 34
- [ 45.324523] trylock #1 status[0] = 0
- [ 45.328125] trylock #2 status[0] = -16
- [ 45.331787] trylock after unlock status[0] = 0
- [ 45.336181] trylock #1 status[1] = 0
- [ 45.339752] trylock #2 status[1] = -16
- [ 45.343444] trylock after unlock status[1] = 0
- [ 45.347900]
- [ 45.347900] Testing lock 35
- [ 45.352081] trylock #1 status[0] = 0
- [ 45.355621] trylock #2 status[0] = -16
- [ 45.359375] trylock after unlock status[0] = 0
- [ 45.363739] trylock #1 status[1] = 0
- [ 45.367340] trylock #2 status[1] = -16
- [ 45.371002] trylock after unlock status[1] = 0
- [ 45.375396]
- [ 45.375396] Testing lock 36
- [ 45.379699] trylock #1 status[0] = 0
- [ 45.383178] trylock #2 status[0] = -16
- [ 45.386871] trylock after unlock status[0] = 0
- [ 45.391326] trylock #1 status[1] = 0
- [ 45.394836] trylock #2 status[1] = -16
- [ 45.398590] trylock after unlock status[1] = 0
- [ 45.402954]
- [ 45.402954] Testing lock 37
- [ 45.407165] trylock #1 status[0] = 0
- [ 45.410766] trylock #2 status[0] = -16
- [ 45.414428] trylock after unlock status[0] = 0
- [ 45.418884] trylock #1 status[1] = 0
- [ 45.422393] trylock #2 status[1] = -16
- [ 45.426055] trylock after unlock status[1] = 0
- [ 45.430541]
- [ 45.430541] Testing lock 38
- [ 45.434722] trylock #1 status[0] = 0
- [ 45.438323] trylock #2 status[0] = -16
- [ 45.441986] trylock after unlock status[0] = 0
- [ 45.446350] trylock #1 status[1] = 0
- [ 45.449951] trylock #2 status[1] = -16
- [ 45.453613] trylock after unlock status[1] = 0
- [ 45.458068]
- [ 45.458068] Testing lock 39
- [ 45.462280] trylock #1 status[0] = 0
- [ 45.465789] trylock #2 status[0] = -16
- [ 45.469573] trylock after unlock status[0] = 0
- [ 45.473907] trylock #1 status[1] = 0
- [ 45.477508] trylock #2 status[1] = -16
- [ 45.481170] trylock after unlock status[1] = 0
- [ 45.485565]
- [ 45.485565] Testing lock 40
- [ 45.489837] trylock #1 status[0] = 0
- [ 45.493347] trylock #2 status[0] = -16
- [ 45.497039] trylock after unlock status[0] = 0
- [ 45.501495] trylock #1 status[1] = 0
- [ 45.504974] trylock #2 status[1] = -16
- [ 45.508758] trylock after unlock status[1] = 0
- [ 45.513122]
- [ 45.513122] Testing lock 41
- [ 45.517395] trylock #1 status[0] = 0
- [ 45.520904] trylock #2 status[0] = -16
- [ 45.524566] trylock after unlock status[0] = 0
- [ 45.529022] trylock #1 status[1] = 0
- [ 45.532531] trylock #2 status[1] = -16
- [ 45.536224] trylock after unlock status[1] = 0
- [ 45.540679]
- [ 45.540679] Testing lock 42
- [ 45.544860] trylock #1 status[0] = 0
- [ 45.548461] trylock #2 status[0] = -16
- [ 45.552124] trylock after unlock status[0] = 0
- [ 45.556488] trylock #1 status[1] = 0
- [ 45.560089] trylock #2 status[1] = -16
- [ 45.563781] trylock after unlock status[1] = 0
- [ 45.568237]
- [ 45.568237] Testing lock 43
- [ 45.572418] trylock #1 status[0] = 0
- [ 45.575927] trylock #2 status[0] = -16
- [ 45.579711] trylock after unlock status[0] = 0
- [ 45.584075] trylock #1 status[1] = 0
- [ 45.587646] trylock #2 status[1] = -16
- [ 45.591339] trylock after unlock status[1] = 0
- [ 45.595733]
- [ 45.595733] Testing lock 44
- [ 45.600006] trylock #1 status[0] = 0
- [ 45.603515] trylock #2 status[0] = -16
- [ 45.607208] trylock after unlock status[0] = 0
- [ 45.611633] trylock #1 status[1] = 0
- [ 45.615142] trylock #2 status[1] = -16
- [ 45.618896] trylock after unlock status[1] = 0
- [ 45.623260]
- [ 45.623260] Testing lock 45
- [ 45.627563] trylock #1 status[0] = 0
- [ 45.631042] trylock #2 status[0] = -16
- [ 45.634735] trylock after unlock status[0] = 0
- [ 45.639160] trylock #1 status[1] = 0
- [ 45.642669] trylock #2 status[1] = -16
- [ 45.646362] trylock after unlock status[1] = 0
- [ 45.650848]
- [ 45.650848] Testing lock 46
- [ 45.655029] trylock #1 status[0] = 0
- [ 45.658630] trylock #2 status[0] = -16
- [ 45.662322] trylock after unlock status[0] = 0
- [ 45.666687] trylock #1 status[1] = 0
- [ 45.670257] trylock #2 status[1] = -16
- [ 45.673950] trylock after unlock status[1] = 0
- [ 45.678405]
- [ 45.678405] Testing lock 47
- [ 45.682586] trylock #1 status[0] = 0
- [ 45.686126] trylock #2 status[0] = -16
- [ 45.689880] trylock after unlock status[0] = 0
- [ 45.694244] trylock #1 status[1] = 0
- [ 45.697845] trylock #2 status[1] = -16
- [ 45.701507] trylock after unlock status[1] = 0
- [ 45.705902]
- [ 45.705902] Testing lock 48
- [ 45.710205] trylock #1 status[0] = 0
- [ 45.713684] trylock #2 status[0] = -16
- [ 45.717468] trylock after unlock status[0] = 0
- [ 45.721801] trylock #1 status[1] = 0
- [ 45.725341] trylock #2 status[1] = -16
- [ 45.729095] trylock after unlock status[1] = 0
- [ 45.733459]
- [ 45.733459] Testing lock 49
- [ 45.737762] trylock #1 status[0] = 0
- [ 45.741241] trylock #2 status[0] = -16
- [ 45.744934] trylock after unlock status[0] = 0
- [ 45.749359] trylock #1 status[1] = 0
- [ 45.752868] trylock #2 status[1] = -16
- [ 45.756561] trylock after unlock status[1] = 0
- [ 45.761016]
- [ 45.761016] Testing lock 50
- [ 45.765197] trylock #1 status[0] = 0
- [ 45.768798] trylock #2 status[0] = -16
- [ 45.772491] trylock after unlock status[0] = 0
- [ 45.776855] trylock #1 status[1] = 0
- [ 45.780456] trylock #2 status[1] = -16
- [ 45.784118] trylock after unlock status[1] = 0
- [ 45.788574]
- [ 45.788574] Testing lock 51
- [ 45.792785] trylock #1 status[0] = 0
- [ 45.796295] trylock #2 status[0] = -16
- [ 45.800048] trylock after unlock status[0] = 0
- [ 45.804412] trylock #1 status[1] = 0
- [ 45.808013] trylock #2 status[1] = -16
- [ 45.811676] trylock after unlock status[1] = 0
- [ 45.816070]
- [ 45.816070] Testing lock 52
- [ 45.820343] trylock #1 status[0] = 0
- [ 45.823852] trylock #2 status[0] = -16
- [ 45.827636] trylock after unlock status[0] = 0
- [ 45.832000] trylock #1 status[1] = 0
- [ 45.835510] trylock #2 status[1] = -16
- [ 45.839294] trylock after unlock status[1] = 0
- [ 45.843658]
- [ 45.843658] Testing lock 53
- [ 45.848022] trylock #1 status[0] = 0
- [ 45.851531] trylock #2 status[0] = -16
- [ 45.855194] trylock after unlock status[0] = 0
- [ 45.859649] trylock #1 status[1] = 0
- [ 45.863128] trylock #2 status[1] = -16
- [ 45.866821] trylock after unlock status[1] = 0
- [ 45.871307]
- [ 45.871307] Testing lock 54
- [ 45.875488] trylock #1 status[0] = 0
- [ 45.879089] trylock #2 status[0] = -16
- [ 45.882781] trylock after unlock status[0] = 0
- [ 45.887145] trylock #1 status[1] = 0
- [ 45.890716] trylock #2 status[1] = -16
- [ 45.894409] trylock after unlock status[1] = 0
- [ 45.898864]
- [ 45.898864] Testing lock 55
- [ 45.903076] trylock #1 status[0] = 0
- [ 45.906585] trylock #2 status[0] = -16
- [ 45.910339] trylock after unlock status[0] = 0
- [ 45.914703] trylock #1 status[1] = 0
- [ 45.918304] trylock #2 status[1] = -16
- [ 45.921966] trylock after unlock status[1] = 0
- [ 45.926361]
- [ 45.926361] Testing lock 56
- [ 45.930633] trylock #1 status[0] = 0
- [ 45.934143] trylock #2 status[0] = -16
- [ 45.937896] trylock after unlock status[0] = 0
- [ 45.942260] trylock #1 status[1] = 0
- [ 45.945770] trylock #2 status[1] = -16
- [ 45.949554] trylock after unlock status[1] = 0
- [ 45.953918]
- [ 45.953918] Testing lock 57
- [ 45.958190] trylock #1 status[0] = 0
- [ 45.961700] trylock #2 status[0] = -16
- [ 45.965393] trylock after unlock status[0] = 0
- [ 45.969848] trylock #1 status[1] = 0
- [ 45.973327] trylock #2 status[1] = -16
- [ 45.977020] trylock after unlock status[1] = 0
- [ 45.981506]
- [ 45.981506] Testing lock 58
- [ 45.985687] trylock #1 status[0] = 0
- [ 45.989288] trylock #2 status[0] = -16
- [ 45.992950] trylock after unlock status[0] = 0
- [ 45.997406] trylock #1 status[1] = 0
- [ 46.000885] trylock #2 status[1] = -16
- [ 46.004577] trylock after unlock status[1] = 0
- [ 46.009033]
- [ 46.009033] Testing lock 59
- [ 46.013214] trylock #1 status[0] = 0
- [ 46.016723] trylock #2 status[0] = -16
- [ 46.020507] trylock after unlock status[0] = 0
- [ 46.024841] trylock #1 status[1] = 0
- [ 46.028442] trylock #2 status[1] = -16
- [ 46.032104] trylock after unlock status[1] = 0
- [ 46.036499]
- [ 46.036499] Testing lock 60
- [ 46.040802] trylock #1 status[0] = 0
- [ 46.044281] trylock #2 status[0] = -16
- [ 46.048065] trylock after unlock status[0] = 0
- [ 46.052398] trylock #1 status[1] = 0
- [ 46.055938] trylock #2 status[1] = -16
- [ 46.059692] trylock after unlock status[1] = 0
- [ 46.064056]
- [ 46.064056] Testing lock 61
- [ 46.068359] trylock #1 status[0] = 0
- [ 46.071868] trylock #2 status[0] = -16
- [ 46.075561] trylock after unlock status[0] = 0
- [ 46.079986] trylock #1 status[1] = 0
- [ 46.083496] trylock #2 status[1] = -16
- [ 46.087188] trylock after unlock status[1] = 0
- [ 46.091644]
- [ 46.091644] Testing lock 62
- [ 46.095825] trylock #1 status[0] = 0
- [ 46.099426] trylock #2 status[0] = -16
- [ 46.103088] trylock after unlock status[0] = 0
- [ 46.107543] trylock #1 status[1] = 0
- [ 46.111053] trylock #2 status[1] = -16
- [ 46.114715] trylock after unlock status[1] = 0
- [ 46.119171]
- [ 46.119171] Testing lock 63
- [ 46.123352] trylock #1 status[0] = 0
- [ 46.126892] trylock #2 status[0] = -16
- [ 46.130645] trylock after unlock status[0] = 0
- [ 46.135009] trylock #1 status[1] = 0
- [ 46.138610] trylock #2 status[1] = -16
- [ 46.142272] trylock after unlock status[1] = 0
- [ 46.146667]
- [ 46.146667] Testing lock 64
- [ 46.150970] trylock #1 status[0] = 0
- [ 46.154449] trylock #2 status[0] = -16
- [ 46.158233] trylock after unlock status[0] = 0
- [ 46.162567] trylock #1 status[1] = 0
- [ 46.166107] trylock #2 status[1] = -16
- [ 46.169860] trylock after unlock status[1] = 0
- [ 46.174224]
- [ 46.174224] Testing lock 65
- [ 46.178497] trylock #1 status[0] = 0
- [ 46.182006] trylock #2 status[0] = -16
- [ 46.185699] trylock after unlock status[0] = 0
- [ 46.190155] trylock #1 status[1] = 0
- [ 46.193634] trylock #2 status[1] = -16
- [ 46.197418] trylock after unlock status[1] = 0
- [ 46.201782]
- [ 46.201782] Testing lock 66
- [ 46.205993] trylock #1 status[0] = 0
- [ 46.209594] trylock #2 status[0] = -16
- [ 46.213256] trylock after unlock status[0] = 0
- [ 46.217712] trylock #1 status[1] = 0
- [ 46.221221] trylock #2 status[1] = -16
- [ 46.224884] trylock after unlock status[1] = 0
- [ 46.229339]
- [ 46.229339] Testing lock 67
- [ 46.233520] trylock #1 status[0] = 0
- [ 46.237030] trylock #2 status[0] = -16
- [ 46.240814] trylock after unlock status[0] = 0
- [ 46.245147] trylock #1 status[1] = 0
- [ 46.248748] trylock #2 status[1] = -16
- [ 46.252410] trylock after unlock status[1] = 0
- [ 46.256805]
- [ 46.256805] Testing lock 68
- [ 46.261108] trylock #1 status[0] = 0
- [ 46.264587] trylock #2 status[0] = -16
- [ 46.268371] trylock after unlock status[0] = 0
- [ 46.272705] trylock #1 status[1] = 0
- [ 46.276214] trylock #2 status[1] = -16
- [ 46.279998] trylock after unlock status[1] = 0
- [ 46.284362]
- [ 46.284362] Testing lock 69
- [ 46.288665] trylock #1 status[0] = 0
- [ 46.292144] trylock #2 status[0] = -16
- [ 46.295837] trylock after unlock status[0] = 0
- [ 46.300292] trylock #1 status[1] = 0
- [ 46.303802] trylock #2 status[1] = -16
- [ 46.307556] trylock after unlock status[1] = 0
- [ 46.311920]
- [ 46.311920] Testing lock 70
- [ 46.316131] trylock #1 status[0] = 0
- [ 46.319732] trylock #2 status[0] = -16
- [ 46.323425] trylock after unlock status[0] = 0
- [ 46.327850] trylock #1 status[1] = 0
- [ 46.331359] trylock #2 status[1] = -16
- [ 46.335021] trylock after unlock status[1] = 0
- [ 46.339477]
- [ 46.339477] Testing lock 71
- [ 46.343658] trylock #1 status[0] = 0
- [ 46.347198] trylock #2 status[0] = -16
- [ 46.350952] trylock after unlock status[0] = 0
- [ 46.355316] trylock #1 status[1] = 0
- [ 46.358886] trylock #2 status[1] = -16
- [ 46.362579] trylock after unlock status[1] = 0
- [ 46.366973]
- [ 46.366973] Testing lock 72
- [ 46.371246] trylock #1 status[0] = 0
- [ 46.374755] trylock #2 status[0] = -16
- [ 46.378509] trylock after unlock status[0] = 0
- [ 46.382873] trylock #1 status[1] = 0
- [ 46.386383] trylock #2 status[1] = -16
- [ 46.390167] trylock after unlock status[1] = 0
- [ 46.394531]
- [ 46.394531] Testing lock 73
- [ 46.398803] trylock #1 status[0] = 0
- [ 46.402313] trylock #2 status[0] = -16
- [ 46.406005] trylock after unlock status[0] = 0
- [ 46.410461] trylock #1 status[1] = 0
- [ 46.413940] trylock #2 status[1] = -16
- [ 46.417724] trylock after unlock status[1] = 0
- [ 46.422088]
- [ 46.422088] Testing lock 74
- [ 46.426300] trylock #1 status[0] = 0
- [ 46.429901] trylock #2 status[0] = -16
- [ 46.433563] trylock after unlock status[0] = 0
- [ 46.438018] trylock #1 status[1] = 0
- [ 46.441528] trylock #2 status[1] = -16
- [ 46.445190] trylock after unlock status[1] = 0
- [ 46.449645]
- [ 46.449645] Testing lock 75
- [ 46.453826] trylock #1 status[0] = 0
- [ 46.457427] trylock #2 status[0] = -16
- [ 46.461090] trylock after unlock status[0] = 0
- [ 46.465454] trylock #1 status[1] = 0
- [ 46.469055] trylock #2 status[1] = -16
- [ 46.472717] trylock after unlock status[1] = 0
- [ 46.477142]
- [ 46.477142] Testing lock 76
- [ 46.481414] trylock #1 status[0] = 0
- [ 46.484893] trylock #2 status[0] = -16
- [ 46.488677] trylock after unlock status[0] = 0
- [ 46.493041] trylock #1 status[1] = 0
- [ 46.496551] trylock #2 status[1] = -16
- [ 46.500305] trylock after unlock status[1] = 0
- [ 46.504699]
- [ 46.504699] Testing lock 77
- [ 46.508972] trylock #1 status[0] = 0
- [ 46.512481] trylock #2 status[0] = -16
- [ 46.516174] trylock after unlock status[0] = 0
- [ 46.520599] trylock #1 status[1] = 0
- [ 46.524108] trylock #2 status[1] = -16
- [ 46.527862] trylock after unlock status[1] = 0
- [ 46.532257]
- [ 46.532257] Testing lock 78
- [ 46.536468] trylock #1 status[0] = 0
- [ 46.540039] trylock #2 status[0] = -16
- [ 46.543731] trylock after unlock status[0] = 0
- [ 46.548156] trylock #1 status[1] = 0
- [ 46.551666] trylock #2 status[1] = -16
- [ 46.555358] trylock after unlock status[1] = 0
- [ 46.559814]
- [ 46.559814] Testing lock 79
- [ 46.563995] trylock #1 status[0] = 0
- [ 46.567596] trylock #2 status[0] = -16
- [ 46.571289] trylock after unlock status[0] = 0
- [ 46.575653] trylock #1 status[1] = 0
- [ 46.579254] trylock #2 status[1] = -16
- [ 46.582916] trylock after unlock status[1] = 0
- [ 46.587402]
- [ 46.587402] Testing lock 80
- [ 46.591583] trylock #1 status[0] = 0
- [ 46.595092] trylock #2 status[0] = -16
- [ 46.598876] trylock after unlock status[0] = 0
- [ 46.603240] trylock #1 status[1] = 0
- [ 46.606750] trylock #2 status[1] = -16
- [ 46.610504] trylock after unlock status[1] = 0
- [ 46.614898]
- [ 46.614898] Testing lock 81
- [ 46.619171] trylock #1 status[0] = 0
- [ 46.622650] trylock #2 status[0] = -16
- [ 46.626342] trylock after unlock status[0] = 0
- [ 46.630798] trylock #1 status[1] = 0
- [ 46.634307] trylock #2 status[1] = -16
- [ 46.638061] trylock after unlock status[1] = 0
- [ 46.642456]
- [ 46.642456] Testing lock 82
- [ 46.646636] trylock #1 status[0] = 0
- [ 46.650238] trylock #2 status[0] = -16
- [ 46.653930] trylock after unlock status[0] = 0
- [ 46.658355] trylock #1 status[1] = 0
- [ 46.661865] trylock #2 status[1] = -16
- [ 46.665557] trylock after unlock status[1] = 0
- [ 46.670013]
- [ 46.670013] Testing lock 83
- [ 46.674194] trylock #1 status[0] = 0
- [ 46.677795] trylock #2 status[0] = -16
- [ 46.681488] trylock after unlock status[0] = 0
- [ 46.685852] trylock #1 status[1] = 0
- [ 46.689422] trylock #2 status[1] = -16
- [ 46.693115] trylock after unlock status[1] = 0
- [ 46.697570]
- [ 46.697570] Testing lock 84
- [ 46.701751] trylock #1 status[0] = 0
- [ 46.705291] trylock #2 status[0] = -16
- [ 46.709045] trylock after unlock status[0] = 0
- [ 46.713409] trylock #1 status[1] = 0
- [ 46.716918] trylock #2 status[1] = -16
- [ 46.720672] trylock after unlock status[1] = 0
- [ 46.725067]
- [ 46.725067] Testing lock 85
- [ 46.729339] trylock #1 status[0] = 0
- [ 46.732849] trylock #2 status[0] = -16
- [ 46.736541] trylock after unlock status[0] = 0
- [ 46.740997] trylock #1 status[1] = 0
- [ 46.744506] trylock #2 status[1] = -16
- [ 46.748260] trylock after unlock status[1] = 0
- [ 46.752624]
- [ 46.752624] Testing lock 86
- [ 46.756835] trylock #1 status[0] = 0
- [ 46.760437] trylock #2 status[0] = -16
- [ 46.764099] trylock after unlock status[0] = 0
- [ 46.768554] trylock #1 status[1] = 0
- [ 46.772033] trylock #2 status[1] = -16
- [ 46.775726] trylock after unlock status[1] = 0
- [ 46.780212]
- [ 46.780212] Testing lock 87
- [ 46.784393] trylock #1 status[0] = 0
- [ 46.787994] trylock #2 status[0] = -16
- [ 46.791656] trylock after unlock status[0] = 0
- [ 46.796020] trylock #1 status[1] = 0
- [ 46.799621] trylock #2 status[1] = -16
- [ 46.803314] trylock after unlock status[1] = 0
- [ 46.807769]
- [ 46.807769] Testing lock 88
- [ 46.811950] trylock #1 status[0] = 0
- [ 46.815490] trylock #2 status[0] = -16
- [ 46.819244] trylock after unlock status[0] = 0
- [ 46.823608] trylock #1 status[1] = 0
- [ 46.827117] trylock #2 status[1] = -16
- [ 46.830871] trylock after unlock status[1] = 0
- [ 46.835266]
- [ 46.835266] Testing lock 89
- [ 46.839538] trylock #1 status[0] = 0
- [ 46.843048] trylock #2 status[0] = -16
- [ 46.846740] trylock after unlock status[0] = 0
- [ 46.851165] trylock #1 status[1] = 0
- [ 46.854675] trylock #2 status[1] = -16
- [ 46.858428] trylock after unlock status[1] = 0
- [ 46.862823]
- [ 46.862823] Testing lock 90
- [ 46.867034] trylock #1 status[0] = 0
- [ 46.870635] trylock #2 status[0] = -16
- [ 46.874298] trylock after unlock status[0] = 0
- [ 46.878753] trylock #1 status[1] = 0
- [ 46.882232] trylock #2 status[1] = -16
- [ 46.885925] trylock after unlock status[1] = 0
- [ 46.890411]
- [ 46.890411] Testing lock 91
- [ 46.894592] trylock #1 status[0] = 0
- [ 46.898193] trylock #2 status[0] = -16
- [ 46.901855] trylock after unlock status[0] = 0
- [ 46.906219] trylock #1 status[1] = 0
- [ 46.909820] trylock #2 status[1] = -16
- [ 46.913482] trylock after unlock status[1] = 0
- [ 46.917968]
- [ 46.917968] Testing lock 92
- [ 46.922149] trylock #1 status[0] = 0
- [ 46.925659] trylock #2 status[0] = -16
- [ 46.929443] trylock after unlock status[0] = 0
- [ 46.933776] trylock #1 status[1] = 0
- [ 46.937377] trylock #2 status[1] = -16
- [ 46.941040] trylock after unlock status[1] = 0
- [ 46.945434]
- [ 46.945434] Testing lock 93
- [ 46.949737] trylock #1 status[0] = 0
- [ 46.953216] trylock #2 status[0] = -16
- [ 46.956909] trylock after unlock status[0] = 0
- [ 46.961364] trylock #1 status[1] = 0
- [ 46.964843] trylock #2 status[1] = -16
- [ 46.968627] trylock after unlock status[1] = 0
- [ 46.972991]
- [ 46.972991] Testing lock 94
- [ 46.977203] trylock #1 status[0] = 0
- [ 46.980804] trylock #2 status[0] = -16
- [ 46.984466] trylock after unlock status[0] = 0
- [ 46.988922] trylock #1 status[1] = 0
- [ 46.992431] trylock #2 status[1] = -16
- [ 46.996124] trylock after unlock status[1] = 0
- [ 47.000579]
- [ 47.000579] Testing lock 95
- [ 47.004760] trylock #1 status[0] = 0
- [ 47.008361] trylock #2 status[0] = -16
- [ 47.012054] trylock after unlock status[0] = 0
- [ 47.016418] trylock #1 status[1] = 0
- [ 47.019989] trylock #2 status[1] = -16
- [ 47.023681] trylock after unlock status[1] = 0
- [ 47.028137]
- [ 47.028137] Testing lock 96
- [ 47.032318] trylock #1 status[0] = 0
- [ 47.035858] trylock #2 status[0] = -16
- [ 47.039611] trylock after unlock status[0] = 0
- [ 47.043975] trylock #1 status[1] = 0
- [ 47.047546] trylock #2 status[1] = -16
- [ 47.051239] trylock after unlock status[1] = 0
- [ 47.055633]
- [ 47.055633] Testing lock 97
- [ 47.059906] trylock #1 status[0] = 0
- [ 47.063415] trylock #2 status[0] = -16
- [ 47.067108] trylock after unlock status[0] = 0
- [ 47.071563] trylock #1 status[1] = 0
- [ 47.075042] trylock #2 status[1] = -16
- [ 47.078826] trylock after unlock status[1] = 0
- [ 47.083190]
- [ 47.083190] Testing lock 98
- [ 47.087463] trylock #1 status[0] = 0
- [ 47.090972] trylock #2 status[0] = -16
- [ 47.094635] trylock after unlock status[0] = 0
- [ 47.099090] trylock #1 status[1] = 0
- [ 47.102569] trylock #2 status[1] = -16
- [ 47.106262] trylock after unlock status[1] = 0
- [ 47.110748]
- [ 47.110748] Testing lock 99
- [ 47.114929] trylock #1 status[0] = 0
- [ 47.118530] trylock #2 status[0] = -16
- [ 47.122192] trylock after unlock status[0] = 0
- [ 47.126586] trylock #1 status[1] = 0
- [ 47.130157] trylock #2 status[1] = -16
- [ 47.133850] trylock after unlock status[1] = 0
- [ 47.138305]
- [ 47.138305] Testing lock 100
- [ 47.142578] trylock #1 status[0] = 0
- [ 47.146087] trylock #2 status[0] = -16
- [ 47.149871] trylock after unlock status[0] = 0
- [ 47.154205] trylock #1 status[1] = 0
- [ 47.157806] trylock #2 status[1] = -16
- [ 47.161468] trylock after unlock status[1] = 0
- [ 47.165863]
- [ 47.165863] Testing lock 101
- [ 47.170227] trylock #1 status[0] = 0
- [ 47.173736] trylock #2 status[0] = -16
- [ 47.177520] trylock after unlock status[0] = 0
- [ 47.181854] trylock #1 status[1] = 0
- [ 47.185394] trylock #2 status[1] = -16
- [ 47.189147] trylock after unlock status[1] = 0
- [ 47.193511]
- [ 47.193511] Testing lock 102
- [ 47.197906] trylock #1 status[0] = 0
- [ 47.201385] trylock #2 status[0] = -16
- [ 47.205047] trylock after unlock status[0] = 0
- [ 47.209503] trylock #1 status[1] = 0
- [ 47.213012] trylock #2 status[1] = -16
- [ 47.216705] trylock after unlock status[1] = 0
- [ 47.221160]
- [ 47.221160] Testing lock 103
- [ 47.225433] trylock #1 status[0] = 0
- [ 47.229034] trylock #2 status[0] = -16
- [ 47.232696] trylock after unlock status[0] = 0
- [ 47.237060] trylock #1 status[1] = 0
- [ 47.240661] trylock #2 status[1] = -16
- [ 47.244354] trylock after unlock status[1] = 0
- [ 47.248809]
- [ 47.248809] Testing lock 104
- [ 47.253082] trylock #1 status[0] = 0
- [ 47.256591] trylock #2 status[0] = -16
- [ 47.260375] trylock after unlock status[0] = 0
- [ 47.264739] trylock #1 status[1] = 0
- [ 47.268310] trylock #2 status[1] = -16
- [ 47.272003] trylock after unlock status[1] = 0
- [ 47.276397]
- [ 47.276397] Testing lock 105
- [ 47.280761] trylock #1 status[0] = 0
- [ 47.284240] trylock #2 status[0] = -16
- [ 47.288024] trylock after unlock status[0] = 0
- [ 47.292358] trylock #1 status[1] = 0
- [ 47.295898] trylock #2 status[1] = -16
- [ 47.299652] trylock after unlock status[1] = 0
- [ 47.304046]
- [ 47.304046] Testing lock 106
- [ 47.308380] trylock #1 status[0] = 0
- [ 47.311889] trylock #2 status[0] = -16
- [ 47.315582] trylock after unlock status[0] = 0
- [ 47.320037] trylock #1 status[1] = 0
- [ 47.323516] trylock #2 status[1] = -16
- [ 47.327239] trylock after unlock status[1] = 0
- [ 47.331695]
- [ 47.331695] Testing lock 107
- [ 47.335968] trylock #1 status[0] = 0
- [ 47.339569] trylock #2 status[0] = -16
- [ 47.343231] trylock after unlock status[0] = 0
- [ 47.347686] trylock #1 status[1] = 0
- [ 47.351165] trylock #2 status[1] = -16
- [ 47.354827] trylock after unlock status[1] = 0
- [ 47.359313]
- [ 47.359313] Testing lock 108
- [ 47.363586] trylock #1 status[0] = 0
- [ 47.367095] trylock #2 status[0] = -16
- [ 47.370849] trylock after unlock status[0] = 0
- [ 47.375213] trylock #1 status[1] = 0
- [ 47.378814] trylock #2 status[1] = -16
- [ 47.382476] trylock after unlock status[1] = 0
- [ 47.386871]
- [ 47.386871] Testing lock 109
- [ 47.391235] trylock #1 status[0] = 0
- [ 47.394744] trylock #2 status[0] = -16
- [ 47.398529] trylock after unlock status[0] = 0
- [ 47.402862] trylock #1 status[1] = 0
- [ 47.406402] trylock #2 status[1] = -16
- [ 47.410156] trylock after unlock status[1] = 0
- [ 47.414520]
- [ 47.414520] Testing lock 110
- [ 47.418884] trylock #1 status[0] = 0
- [ 47.422393] trylock #2 status[0] = -16
- [ 47.426086] trylock after unlock status[0] = 0
- [ 47.430541] trylock #1 status[1] = 0
- [ 47.434051] trylock #2 status[1] = -16
- [ 47.437805] trylock after unlock status[1] = 0
- [ 47.442199]
- [ 47.442199] Testing lock 111
- [ 47.446472] trylock #1 status[0] = 0
- [ 47.450073] trylock #2 status[0] = -16
- [ 47.453735] trylock after unlock status[0] = 0
- [ 47.458190] trylock #1 status[1] = 0
- [ 47.461700] trylock #2 status[1] = -16
- [ 47.465393] trylock after unlock status[1] = 0
- [ 47.469848]
- [ 47.469848] Testing lock 112
- [ 47.474121] trylock #1 status[0] = 0
- [ 47.477722] trylock #2 status[0] = -16
- [ 47.481384] trylock after unlock status[0] = 0
- [ 47.485748] trylock #1 status[1] = 0
- [ 47.489349] trylock #2 status[1] = -16
- [ 47.493011] trylock after unlock status[1] = 0
- [ 47.497497]
- [ 47.497497] Testing lock 113
- [ 47.501770] trylock #1 status[0] = 0
- [ 47.505279] trylock #2 status[0] = -16
- [ 47.509033] trylock after unlock status[0] = 0
- [ 47.513397] trylock #1 status[1] = 0
- [ 47.516906] trylock #2 status[1] = -16
- [ 47.520690] trylock after unlock status[1] = 0
- [ 47.525054]
- [ 47.525054] Testing lock 114
- [ 47.529418] trylock #1 status[0] = 0
- [ 47.532928] trylock #2 status[0] = -16
- [ 47.536621] trylock after unlock status[0] = 0
- [ 47.541046] trylock #1 status[1] = 0
- [ 47.544555] trylock #2 status[1] = -16
- [ 47.548309] trylock after unlock status[1] = 0
- [ 47.552703]
- [ 47.552703] Testing lock 115
- [ 47.556976] trylock #1 status[0] = 0
- [ 47.560577] trylock #2 status[0] = -16
- [ 47.564270] trylock after unlock status[0] = 0
- [ 47.568695] trylock #1 status[1] = 0
- [ 47.572204] trylock #2 status[1] = -16
- [ 47.575897] trylock after unlock status[1] = 0
- [ 47.580352]
- [ 47.580352] Testing lock 116
- [ 47.584625] trylock #1 status[0] = 0
- [ 47.588226] trylock #2 status[0] = -16
- [ 47.591918] trylock after unlock status[0] = 0
- [ 47.596282] trylock #1 status[1] = 0
- [ 47.599853] trylock #2 status[1] = -16
- [ 47.603546] trylock after unlock status[1] = 0
- [ 47.608001]
- [ 47.608001] Testing lock 117
- [ 47.612274] trylock #1 status[0] = 0
- [ 47.615783] trylock #2 status[0] = -16
- [ 47.619567] trylock after unlock status[0] = 0
- [ 47.623931] trylock #1 status[1] = 0
- [ 47.627502] trylock #2 status[1] = -16
- [ 47.631195] trylock after unlock status[1] = 0
- [ 47.635589]
- [ 47.635589] Testing lock 118
- [ 47.639953] trylock #1 status[0] = 0
- [ 47.643432] trylock #2 status[0] = -16
- [ 47.647125] trylock after unlock status[0] = 0
- [ 47.651580] trylock #1 status[1] = 0
- [ 47.655090] trylock #2 status[1] = -16
- [ 47.658843] trylock after unlock status[1] = 0
- [ 47.663208]
- [ 47.663208] Testing lock 119
- [ 47.667572] trylock #1 status[0] = 0
- [ 47.671081] trylock #2 status[0] = -16
- [ 47.674743] trylock after unlock status[0] = 0
- [ 47.679199] trylock #1 status[1] = 0
- [ 47.682708] trylock #2 status[1] = -16
- [ 47.686401] trylock after unlock status[1] = 0
- [ 47.690856]
- [ 47.690856] Testing lock 120
- [ 47.695129] trylock #1 status[0] = 0
- [ 47.698730] trylock #2 status[0] = -16
- [ 47.702392] trylock after unlock status[0] = 0
- [ 47.706756] trylock #1 status[1] = 0
- [ 47.710357] trylock #2 status[1] = -16
- [ 47.714019] trylock after unlock status[1] = 0
- [ 47.718505]
- [ 47.718505] Testing lock 121
- [ 47.722778] trylock #1 status[0] = 0
- [ 47.726287] trylock #2 status[0] = -16
- [ 47.730041] trylock after unlock status[0] = 0
- [ 47.734405] trylock #1 status[1] = 0
- [ 47.738006] trylock #2 status[1] = -16
- [ 47.741668] trylock after unlock status[1] = 0
- [ 47.746063]
- [ 47.746063] Testing lock 122
- [ 47.750427] trylock #1 status[0] = 0
- [ 47.753936] trylock #2 status[0] = -16
- [ 47.757690] trylock after unlock status[0] = 0
- [ 47.762054] trylock #1 status[1] = 0
- [ 47.765563] trylock #2 status[1] = -16
- [ 47.769348] trylock after unlock status[1] = 0
- [ 47.773712]
- [ 47.773712] Testing lock 123
- [ 47.778076] trylock #1 status[0] = 0
- [ 47.781585] trylock #2 status[0] = -16
- [ 47.785278] trylock after unlock status[0] = 0
- [ 47.789703] trylock #1 status[1] = 0
- [ 47.793212] trylock #2 status[1] = -16
- [ 47.796905] trylock after unlock status[1] = 0
- [ 47.801391]
- [ 47.801391] Testing lock 124
- [ 47.805664] trylock #1 status[0] = 0
- [ 47.809265] trylock #2 status[0] = -16
- [ 47.812927] trylock after unlock status[0] = 0
- [ 47.817382] trylock #1 status[1] = 0
- [ 47.820892] trylock #2 status[1] = -16
- [ 47.824554] trylock after unlock status[1] = 0
- [ 47.829010]
- [ 47.829010] Testing lock 125
- [ 47.833282] trylock #1 status[0] = 0
- [ 47.836791] trylock #2 status[0] = -16
- [ 47.840606] trylock after unlock status[0] = 0
- [ 47.844970] trylock #1 status[1] = 0
- [ 47.848541] trylock #2 status[1] = -16
- [ 47.852233] trylock after unlock status[1] = 0
- [ 47.856628]
- [ 47.856628] Testing lock 126
- [ 47.860992] trylock #1 status[0] = 0
- [ 47.864501] trylock #2 status[0] = -16
- [ 47.868255] trylock after unlock status[0] = 0
- [ 47.872619] trylock #1 status[1] = 0
- [ 47.876129] trylock #2 status[1] = -16
- [ 47.879882] trylock after unlock status[1] = 0
- [ 47.884277]
- [ 47.884277] Testing lock 127
- [ 47.888641] trylock #1 status[0] = 0
- [ 47.892150] trylock #2 status[0] = -16
- [ 47.895843] trylock after unlock status[0] = 0
- [ 47.900299] trylock #1 status[1] = 0
- [ 47.903778] trylock #2 status[1] = -16
- [ 47.907531] trylock after unlock status[1] = 0
- [ 47.911895]
- [ 47.911895] ***** End - Test All Locks ****
- /rpmsg #
- /rpmsg #
- /rpmsg #
- /rpmsg # lsmod
- omap_hwspinlock_test 4118 0 - Live 0xbf231000
- omap_hwspinlock 2500 0 - Live 0xbf22d000
- hwspinlock_core 9346 2 omap_hwspinlock_test,omap_hwspinlock, Live 0xbf226000
- /rpmsg #
- /rpmsg # rmmod om/rpmsg # rmmod omap_hwspinlock)_t/rpmsg # rmmod omap_hwspinlock_test.ko
- /rpmsg # /rpmsg # rmmod omap_hwspinlock_test
- /rpmsg # rmmod hw/rpmsg # rmmod hwspinlock_core.ko
- /rpmsg #
- /rpmsg #
- /rpmsg #
AM43x HwSpinlock Test Log baselined on v3.13-rc8