1. /*
2. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
3. * http://www.samsung.com
4. *
5. * EXYNOS - CPU frequency scaling support for EXYNOS series
6. *
7. * This program is free software; you can redistribute it and/or modify
8. * it under the terms of the GNU General Public License version 2 as
9. * published by the Free Software Foundation.
10. *
11. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12. * kind, whether express or implied; without even the implied warranty
13. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14. * GNU General Public License for more details.
15. */
17. #include <linux/kernel.h>
18. #include <linux/err.h>
19. #include <linux/clk.h>
20. #include <linux/io.h>
21. #include <linux/slab.h>
22. #include <linux/regulator/consumer.h>
23. #include <linux/cpufreq.h>
24. #include <linux/suspend.h>
25. #include <linux/module.h>
26. #include <linux/reboot.h>
27. #include <linux/delay.h>
28. #include <linux/cpu.h>
29. #include <linux/pm_qos.h>
31. #include <asm/cputype.h>
32. #include <asm/bL_switcher.h>
33. #include <mach/cpufreq.h>
34. #include <mach/regs-pmu.h>
35. #include <mach/tmu.h>
36. #include <mach/asv-exynos.h>
37. #include <plat/cpu.h>
38. #include <mach/sec_debug.h>
40. struct lpj_info {
41. unsigned long ref;
42. unsigned int freq;
43. };
45. static struct lpj_info global_lpj_ref;
47. /* Use boot_freq when entering sleep mode */
48. static unsigned int boot_freq;
50. /* For switcher */
51. static unsigned int freq_min[CA_END] __read_mostly; /* Minimum (Big/Little) clock frequency */
52. static unsigned int freq_max[CA_END] __read_mostly; /* Maximum (Big/Little) clock frequency */
53. static struct cpumask cluster_cpus[CA_END]; /* cpu number on (Big/Little) cluster */
54. static unsigned long lpj[CA_END];
55. #define ACTUAL_FREQ(x, cur) ((cur == CA7) ? (x) << 1 : (x))
56. #define VIRT_FREQ(x, cur) ((cur == CA7) ? (x) >> 1 : (x))
58. /*
59. * This value is based on the difference between the dmips value of A15/A7
60. * It is used to revise cpu frequency when changing cluster
61. */
62. #define UP_IKS_THRESH 6
63. #define DOWN_IKS_THRESH 18
64. #define DOWN_STEP_OLD 1100000
65. #define DOWN_STEP_NEW 600000
66. #define UP_STEP_OLD 550000
67. #define UP_STEP_NEW 600000
68. #define STEP_LEVEL_CA7_MAX 600000
69. #define STEP_LEVEL_CA15_MIN 800000
71. #define LIMIT_COLD_VOLTAGE 1250000
72. #define CPU_MAX_COUNT 4
74. static struct exynos_dvfs_info *exynos_info[CA_END];
75. static struct exynos_dvfs_info exynos_info_CA7;
76. static struct exynos_dvfs_info exynos_info_CA15;
78. static struct cpufreq_frequency_table *merge_freq_table;
80. static struct regulator *arm_regulator;
81. static struct regulator *kfc_regulator;
82. static unsigned int volt_offset;
83. static int volt_powerdown[CA_END];
84. static unsigned int policy_max_freq;
86. static struct cpufreq_freqs *freqs[CA_END];
88. static unsigned int exynos5410_bb_con0;
89. static unsigned int user_set_max_freq;
90. static unsigned int user_set_eagle_count;
91. static unsigned int all_cpu_freqs[CPU_MAX_COUNT];
93. static DEFINE_MUTEX(cpufreq_lock);
94. static DEFINE_MUTEX(cpufreq_scale_lock);
96. static bool exynos_cpufreq_init_done;
98. /* Include CPU mask of each cluster */
99. static cluster_type boot_cluster;
101. DEFINE_PER_CPU(cluster_type, cpu_cur_cluster);
102. static DEFINE_PER_CPU(unsigned int, req_freq);
104. static struct pm_qos_request boot_cpu_qos;
105. static struct pm_qos_request min_cpu_qos;
107. static struct cpufreq_policy fake_policy[CA_END][NR_CPUS];
109. static unsigned int get_limit_voltage(unsigned int voltage)
110. {
111. if (voltage > LIMIT_COLD_VOLTAGE)
112. return voltage;
114. if (voltage + volt_offset > LIMIT_COLD_VOLTAGE)
115. return LIMIT_COLD_VOLTAGE;
117. return voltage + volt_offset;
118. }
120. static void init_cpumask_cluster_set(unsigned int cluster)
121. {
122. unsigned int i;
124. for_each_cpu(i, cpu_possible_mask) {
125. per_cpu(cpu_cur_cluster, i) = cluster;
126. if (cluster == CA15)
127. cpumask_set_cpu(i, &cluster_cpus[CA15]);
128. else
129. cpumask_set_cpu(i, &cluster_cpus[CA7]);
130. }
131. }
133. cluster_type get_cur_cluster(unsigned int cpu)
134. {
135. return per_cpu(cpu_cur_cluster, cpu);
136. }
138. cluster_type get_boot_cluster()
139. {
140. return boot_cluster;
141. }
143. static void set_cur_cluster(unsigned int cpu, cluster_type target_cluster)
144. {
145. per_cpu(cpu_cur_cluster, cpu) = target_cluster;
146. }
148. void reset_lpj_for_cluster(cluster_type cluster)
149. {
150. lpj[!cluster] = 0;
151. }
153. static unsigned int get_num_CA15(void)
154. {
155. unsigned int j, num = 0;
157. for_each_cpu(j, cpu_possible_mask) {
158. if (per_cpu(cpu_cur_cluster, j) == CA15 && cpu_online(j))
159. num++;
160. }
162. return num;
163. }
165. static void set_boot_freq(void)
166. {
167. int i;
169. for (i = 0; i < CA_END; i++) {
170. if (exynos_info[i] == NULL)
171. continue;
173. exynos_info[i]->boot_freq
174. = clk_get_rate(exynos_info[i]->cpu_clk) / 1000;
175. }
176. }
178. static unsigned int get_boot_freq(unsigned int cluster)
179. {
180. if (exynos_info[cluster] == NULL)
181. return 0;
183. return exynos_info[cluster]->boot_freq;
184. }
186. /* Get table size */
187. static unsigned int cpufreq_get_table_size(
188. struct cpufreq_frequency_table *table,
189. unsigned int cluster_id)
190. {
191. int size = 0;
193. if (cluster_id == CA15) {
194. for (; (table[size].frequency != CPUFREQ_TABLE_END); size++)
195. ;
196. } else {
197. for (; (table[size].frequency != CPUFREQ_TABLE_END); size++)
198. ;
199. }
200. return size;
201. }
203. /*
204. * copy entries of all the per-cluster cpufreq_frequency_table entries
205. * into a single frequency table which is published to cpufreq core
206. */
207. static int cpufreq_merge_tables(void)
208. {
209. int cluster_id, i;
210. unsigned int total_sz = 0, size[CA_END];
211. struct cpufreq_frequency_table *freq_table;
213. for (cluster_id = 0; cluster_id < CA_END; cluster_id++) {
214. size[cluster_id] = cpufreq_get_table_size(
215. exynos_info[cluster_id]->freq_table, cluster_id);
216. total_sz += size[cluster_id];
217. }
219. freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) *
220. (total_sz + 1), GFP_KERNEL);
221. merge_freq_table = freq_table;
223. memcpy(freq_table, exynos_info[CA15]->freq_table,
224. size[CA15] * sizeof(struct cpufreq_frequency_table));
225. freq_table += size[CA15];
226. memcpy(freq_table, exynos_info[CA7]->freq_table,
227. size[CA7] * sizeof(struct cpufreq_frequency_table));
229. for (i = size[CA15]; i <= total_sz ; i++) {
230. if (merge_freq_table[i].frequency != CPUFREQ_ENTRY_INVALID)
231. merge_freq_table[i].frequency >>= 1;
232. }
234. merge_freq_table[total_sz].frequency = CPUFREQ_TABLE_END;
236. for (i = 0; merge_freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
237. pr_debug("merged_table index: %d freq: %d\n", i,
238. merge_freq_table[i].frequency);
239. }
241. return 0;
242. }
244. static bool is_alive(unsigned int cluster)
245. {
246. unsigned int tmp;
247. tmp = __raw_readl(cluster == CA15 ? EXYNOS5410_ARM_COMMON_STATUS :
248. EXYNOS5410_KFC_COMMON_STATUS) & 0x3;
250. return tmp ? true : false;
251. }
253. /*
254. * Requesting core switch to other cluster. It save the current status
255. * and wakes up the core of new cluster. Then waking core restore status and
256. * take a task of other cluster.
257. */
258. #ifdef CONFIG_BL_SWITCHER
259. static void switch_to_entry(unsigned int cpu,
260. cluster_type target_cluster)
261. {
262. bL_switch_request(cpu, !target_cluster);
263. per_cpu(cpu_cur_cluster, cpu) = target_cluster;
264. }
265. #endif
267. int exynos_verify_speed(struct cpufreq_policy *policy)
268. {
269. return cpufreq_frequency_table_verify(policy, merge_freq_table);
270. }
272. unsigned int exynos_getspeed_cluster(cluster_type cluster)
273. {
274. return VIRT_FREQ(clk_get_rate(exynos_info[cluster]->cpu_clk) / 1000, cluster);
275. }
277. unsigned int exynos_getspeed(unsigned int cpu)
278. {
279. unsigned int cur = get_cur_cluster(cpu);
281. return exynos_getspeed_cluster(cur);
282. }
284. static unsigned int get_max_req_freq(unsigned int cluster_id)
285. {
286. unsigned int i, max_freq = 0, tmp = 0, cur;
288. for_each_online_cpu(i) {
289. cur = get_cur_cluster(i);
290. if (cur == cluster_id) {
291. tmp = per_cpu(req_freq, i);
292. if (tmp > max_freq)
293. max_freq = tmp;
294. }
295. }
297. return max_freq;
298. }
300. static void set_req_freq(unsigned int cpu, unsigned int freq)
301. {
302. per_cpu(req_freq, cpu) = freq;
303. }
305. static unsigned int exynos_get_safe_volt(unsigned int old_index,
306. unsigned int new_index,
307. unsigned int cur)
308. {
309. unsigned int safe_arm_volt = 0;
310. struct cpufreq_frequency_table *freq_table
311. = exynos_info[cur]->freq_table;
312. unsigned int *volt_table = exynos_info[cur]->volt_table;
314. /*
315. * ARM clock source will be changed APLL to MPLL temporary
316. * To support this level, need to control regulator for
317. * reguired voltage level
318. */
319. if (exynos_info[cur]->need_apll_change != NULL) {
320. if (exynos_info[cur]->need_apll_change(old_index, new_index) &&
321. (freq_table[new_index].frequency
322. < exynos_info[cur]->mpll_freq_khz) &&
323. (freq_table[old_index].frequency
324. < exynos_info[cur]->mpll_freq_khz)) {
325. safe_arm_volt
326. = volt_table[exynos_info[cur]->pll_safe_idx];
327. }
328. }
330. return safe_arm_volt;
331. }
333. /* Determine valid target frequency using freq_table */
334. int exynos5_frequency_table_target(struct cpufreq_policy *policy,
335. struct cpufreq_frequency_table *table,
336. unsigned int target_freq,
337. unsigned int relation,
338. unsigned int *index)
339. {
340. unsigned int i;
342. if (!cpu_online(policy->cpu))
343. return -EINVAL;
345. for (i = 0; (table[i].frequency != CPUFREQ_TABLE_END); i++) {
346. unsigned int freq = table[i].frequency;
347. if (freq == CPUFREQ_ENTRY_INVALID)
348. continue;
350. if (target_freq == freq) {
351. *index = i;
352. break;
353. }
354. }
356. if (table[i].frequency == CPUFREQ_TABLE_END)
357. return -EINVAL;
359. return 0;
360. }
362. static int is_cpufreq_valid(int cpu)
363. {
364. struct cpufreq_policy policy;
366. return !cpufreq_get_policy(&policy, cpu);
367. }
369. static int exynos_cpufreq_scale(unsigned int target_freq,
370. unsigned int curr_freq, unsigned int cpu)
371. {
372. unsigned int cur = get_cur_cluster(cpu);
373. struct cpufreq_frequency_table *freq_table
374. = exynos_info[cur]->freq_table;
375. unsigned int *volt_table = exynos_info[cur]->volt_table;
376. struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
377. struct regulator *regulator = exynos_info[cur]->regulator;
378. unsigned int new_index, old_index, j;
379. unsigned int volt, safe_volt = 0;
380. int ret = 0;
382. if (!policy)
383. return ret;
385. if (!is_alive(cur))
386. goto out;
388. freqs[cur]->cpu = cpu;
389. freqs[cur]->new = target_freq;
391. if (exynos5_frequency_table_target(policy, freq_table,
392. ACTUAL_FREQ(curr_freq, cur),
393. CPUFREQ_RELATION_L, &old_index)) {
394. ret = -EINVAL;
395. goto out;
396. }
398. if (exynos5_frequency_table_target(policy, freq_table,
399. ACTUAL_FREQ(freqs[cur]->new, cur),
400. CPUFREQ_RELATION_L, &new_index)) {
401. ret = -EINVAL;
402. goto out;
403. }
405. /*
406. * ARM clock source will be changed APLL to MPLL temporary
407. * To support this level, need to control regulator for
408. * required voltage level
409. */
410. safe_volt = exynos_get_safe_volt(old_index, new_index, cur);
411. if (safe_volt)
412. safe_volt = get_limit_voltage(safe_volt);
414. volt = get_limit_voltage(volt_table[new_index]);
416. /* Update policy current frequency */
417. for_each_cpu(j, &cluster_cpus[cur]) {
418. if (is_cpufreq_valid(j)) {
419. freqs[cur]->cpu = j;
420. cpufreq_notify_transition(
421. freqs[cur], CPUFREQ_PRECHANGE);
422. }
423. }
425. /* When the new frequency is higher than current frequency */
426. if ((ACTUAL_FREQ(freqs[cur]->new, cur) >
427. ACTUAL_FREQ(freqs[cur]->old, cur)) && !safe_volt)
428. /* Firstly, voltage up to increase frequency */
429. regulator_set_voltage(regulator, volt, volt);
431. if (safe_volt)
432. regulator_set_voltage(regulator, safe_volt, safe_volt);
434. if (old_index != new_index)
435. exynos_info[cur]->set_freq(old_index, new_index);
437. if (!global_lpj_ref.freq) {
438. global_lpj_ref.ref = loops_per_jiffy;
439. global_lpj_ref.freq = freqs[cur]->old;
440. }
442. lpj[cur] = cpufreq_scale(global_lpj_ref.ref,
443. global_lpj_ref.freq, freqs[cur]->new);
445. loops_per_jiffy = max(lpj[CA7], lpj[CA15]);
447. for_each_cpu(j, &cluster_cpus[cur]) {
448. if (is_cpufreq_valid(j)) {
449. freqs[cur]->cpu = j;
450. cpufreq_notify_transition(
451. freqs[cur], CPUFREQ_POSTCHANGE);
452. }
453. }
455. /* When the new frequency is lower than current frequency */
456. if ((ACTUAL_FREQ(freqs[cur]->new, cur) <
457. ACTUAL_FREQ(freqs[cur]->old, cur)) ||
458. ((ACTUAL_FREQ(freqs[cur]->new, cur) >
459. ACTUAL_FREQ(freqs[cur]->old, cur)) && safe_volt))
460. /* down the voltage after frequency change */
461. regulator_set_voltage(regulator, volt, volt);
463. out:
464. cpufreq_cpu_put(policy);
465. return ret;
466. }
468. static cluster_type exynos_switch(struct cpufreq_policy *policy, cluster_type cur)
469. {
470. unsigned int cpu;
471. cluster_type new_cluster;
473. new_cluster = !cur;
475. for_each_cpu(cpu, policy->cpus) {
476. switch_to_entry(cpu, new_cluster);
477. /* set big/litte-cpu mask */
478. cpumask_clear_cpu(cpu, &cluster_cpus[cur]);
479. cpumask_set_cpu(cpu, &cluster_cpus[new_cluster]);
480. }
482. return new_cluster;
483. }
485. /* Set clock frequency */
486. static int exynos_target(struct cpufreq_policy *policy,
487. unsigned int target_freq,
488. unsigned int relation)
489. {
490. /* read current cluster */
491. cluster_type cur = get_cur_cluster(policy->cpu);
492. unsigned int index, new_freq = 0, do_switch = 0;
493. int count, ret = 0;
494. bool user = false, later = false, limit_eagle = false;
495. int cpu, delta;
496. unsigned int min_cpu = 0, min_freq = UINT_MAX;
498. mutex_lock(&cpufreq_lock);
500. all_cpu_freqs[policy->cpu] = target_freq;
502. /* delta means the number of cores which has to switch */
503. delta = get_num_CA15() - user_set_eagle_count;
505. if (delta > 0) {
506. /* find minimum frequency core among CA15 */
507. for_each_online_cpu(cpu) {
508. if (all_cpu_freqs[cpu] > freq_max[CA7] &&
509. all_cpu_freqs[cpu] < min_freq) {
510. min_cpu = cpu;
511. min_freq = all_cpu_freqs[cpu];
512. }
513. }
515. /* if current core freq is minimum, switch to CA7 */
516. if (min_cpu == policy->cpu) {
517. target_freq = freq_max[CA7];
518. limit_eagle = true;
519. all_cpu_freqs[policy->cpu] = target_freq;
520. }
521. }
523. /* set target_freq only if core cannot swtich due to user set value */
524. if (get_num_CA15() < CPU_MAX_COUNT) {
525. if (cur == CA7 && user_set_eagle_count <= get_num_CA15()
526. && target_freq > freq_max[CA7]) {
527. target_freq = freq_max[CA7];
528. limit_eagle = true;
529. all_cpu_freqs[policy->cpu] = target_freq;
530. }
531. }
533. if (exynos_info[cur]->blocked)
534. goto out;
536. count = get_num_CA15();
538. /* get current frequency */
539. freqs[cur]->old = exynos_getspeed(policy->cpu);
541. /* save the frequency & cpu number */
542. set_req_freq(policy->cpu, target_freq);
544. sec_debug_aux_log(SEC_DEBUG_AUXLOG_CPU_CLOCK_SWITCH_CHANGE, "IN : cpu=%d cluster=%c pre=%d, new=%d", policy->cpu, (cur == CA7 ? 'L' : 'B'), freqs[cur]->old, target_freq);
546. #if defined(CONFIG_CPU_FREQ_GOV_USERSPACE) || defined(CONFIG_CPU_FREQ_GOV_PERFORMANCE)
547. if ((strcmp(policy->governor->name, "userspace") == 0)
548. || strcmp(policy->governor->name, "performance") == 0) {
549. user = true;
550. goto done;
551. }
552. #endif
554. if (freqs[cur]->old <= UP_STEP_OLD && target_freq > UP_STEP_NEW)
555. target_freq = STEP_LEVEL_CA7_MAX;
557. if (freqs[cur]->old >= DOWN_STEP_OLD && target_freq < DOWN_STEP_NEW) {
558. if (strcmp(policy->governor->name, "ondemand") == 0)
559. target_freq = STEP_LEVEL_CA15_MIN;
560. else
561. target_freq = STEP_LEVEL_CA7_MAX;
562. }
564. if (!limit_eagle)
565. target_freq = max((unsigned int)pm_qos_request(PM_QOS_CPU_FREQ_MIN), target_freq);
567. done:
568. if (cur == CA15 && target_freq < freq_min[CA15]) {
569. do_switch = 1; /* Switch to Little */
570. } else if (cur == CA7 && user_set_eagle_count > get_num_CA15()
571. && target_freq > freq_max[CA7]) {
572. do_switch = 1; /* Switch from LITTLE to big */
573. if (count > 0 && count < 4 &&
574. target_freq > exynos_info[cur]->max_op_freqs[count + 1])
575. later = true;
576. }
578. #ifdef CONFIG_BL_SWITCHER
579. if (do_switch) {
580. if (later) {
581. cur = !cur;
582. count++;
583. set_cur_cluster(policy->cpu, cur);
584. } else {
585. cur = exynos_switch(policy, cur);
586. }
588. freqs[cur]->old = exynos_getspeed_cluster(cur);
589. policy->cur = freqs[cur]->old;
590. }
591. #endif
593. if (user)
594. new_freq = target_freq;
595. else
596. new_freq = max(get_max_req_freq(cur), target_freq);
598. new_freq = min(new_freq, exynos_info[cur]->max_op_freqs[count]);
600. if (cpufreq_frequency_table_target(&fake_policy[cur][policy->cpu],
601. exynos_info[cur]->freq_table, ACTUAL_FREQ(new_freq, cur), relation, &index)) {
602. ret = -EINVAL;
603. goto out;
604. }
605. new_freq = exynos_info[cur]->freq_table[index].frequency;
607. /* frequency and volt scaling */
608. ret = exynos_cpufreq_scale(VIRT_FREQ(new_freq, cur),
609. freqs[cur]->old, policy->cpu);
611. #ifdef CONFIG_BL_SWITCHER
612. if (do_switch && later)
613. exynos_switch(policy, !cur);
614. #endif
615. out:
616. sec_debug_aux_log(SEC_DEBUG_AUXLOG_CPU_CLOCK_SWITCH_CHANGE, "OUT : cpu=%d cluster=%c pre=%d, new=%d other=%x", \
617. policy->cpu, (cur == CA7 ? 'L' : 'B'), freqs[cur]->old, VIRT_FREQ(new_freq,cur), do_switch << 2 | later << 1 | (ret == 0 ? 0 : 1));
619. mutex_unlock(&cpufreq_lock);
621. return ret;
622. }
624. #ifdef CONFIG_PM
625. static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
626. {
627. exynos5410_bb_con0 = __raw_readl(EXYNOS5410_BB_CON0);
628. return 0;
629. }
631. static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
632. {
633. freqs[CA7]->old = VIRT_FREQ(get_boot_freq(CA7), CA7);
634. freqs[CA15]->old = VIRT_FREQ(get_boot_freq(CA15), CA15);
636. __raw_writel(exynos5410_bb_con0, EXYNOS5410_BB_CON0);
637. return 0;
638. }
639. #endif
641. void exynos_lowpower_for_cluster(cluster_type cluster, bool on)
642. {
643. int volt;
645. mutex_lock(&cpufreq_lock);
646. if (cluster == CA15) {
647. if (on) {
648. volt_powerdown[CA15] = regulator_get_voltage(arm_regulator);
649. volt = get_match_volt(ID_ARM, ACTUAL_FREQ(freq_min[CA15], CA15));
650. volt = get_limit_voltage(volt);
651. regulator_set_voltage(arm_regulator, volt, volt);
652. } else {
653. volt = volt_powerdown[CA15];
654. volt = get_limit_voltage(volt);
655. regulator_set_voltage(arm_regulator, volt, volt);
656. }
657. } else {
658. if (on) {
659. volt_powerdown[CA7] = regulator_get_voltage(kfc_regulator);
660. volt = get_match_volt(ID_KFC, ACTUAL_FREQ(freq_min[CA7], CA7));
661. volt = get_limit_voltage(volt);
662. regulator_set_voltage(kfc_regulator, volt, volt);
663. } else {
664. volt = volt_powerdown[CA7];
665. volt = get_limit_voltage(volt);
666. regulator_set_voltage(kfc_regulator, volt, volt);
667. }
668. }
669. mutex_unlock(&cpufreq_lock);
670. }
672. /*
673. * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
674. * context
675. * @notifier
676. * @pm_event
677. * @v
678. *
679. * While cpufreq_disable == true, target() ignores every frequency but
680. * boot_freq. The boot_freq value is the initial frequency,
681. * which is set by the bootloader. In order to eliminate possible
682. * inconsistency in clock values, we save and restore frequencies during
683. * suspend and resume and block CPUFREQ activities. Note that the standard
684. * suspend/resume cannot be used as they are too deep (syscore_ops) for
685. * regulator actions.
686. */
687. static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
688. unsigned long pm_event, void *v)
689. {
690. unsigned int freqCA7, freqCA15;
691. unsigned int bootfreqCA7, bootfreqCA15;
692. int volt;
694. switch (pm_event) {
695. case PM_SUSPEND_PREPARE:
696. mutex_lock(&cpufreq_lock);
697. exynos_info[CA7]->blocked = true;
698. exynos_info[CA15]->blocked = true;
699. mutex_unlock(&cpufreq_lock);
701. bootfreqCA7 = VIRT_FREQ(get_boot_freq(CA7), CA7);
702. bootfreqCA15 = VIRT_FREQ(get_boot_freq(CA15), CA15);
704. freqCA7 = exynos_getspeed_cluster(CA7);
705. freqCA15 = exynos_getspeed_cluster(CA15);
707. volt = max(get_match_volt(ID_KFC, ACTUAL_FREQ(bootfreqCA7, CA7)),
708. get_match_volt(ID_KFC, ACTUAL_FREQ(freqCA7, CA7)));
709. volt = get_limit_voltage(volt);
711. if (regulator_set_voltage(kfc_regulator, volt, volt))
712. goto err;
714. volt = max(get_match_volt(ID_ARM, ACTUAL_FREQ(bootfreqCA15, CA15)),
715. get_match_volt(ID_ARM, ACTUAL_FREQ(freqCA15, CA15)));
716. volt = get_limit_voltage(volt);
718. if (regulator_set_voltage(arm_regulator, volt, volt))
719. goto err;
721. pr_debug("PM_SUSPEND_PREPARE for CPUFREQ\n");
722. break;
723. case PM_POST_SUSPEND:
724. pr_debug("PM_POST_SUSPEND for CPUFREQ\n");
726. mutex_lock(&cpufreq_lock);
727. exynos_info[CA7]->blocked = false;
728. exynos_info[CA15]->blocked = false;
729. mutex_unlock(&cpufreq_lock);
731. break;
732. }
733. return NOTIFY_OK;
734. err:
735. pr_err("%s: failed to set voltage\n", __func__);
737. return NOTIFY_BAD;
738. }
740. static struct notifier_block exynos_cpufreq_nb = {
741. .notifier_call = exynos_cpufreq_pm_notifier,
742. };
744. static int exynos_cpufreq_tmu_notifier(struct notifier_block *notifier,
745. unsigned long event, void *v)
746. {
747. int volt;
748. int *on = v;
750. if (event != TMU_COLD)
751. return NOTIFY_OK;
753. mutex_lock(&cpufreq_lock);
754. if (*on)
755. volt_offset = 75000;
756. else
757. volt_offset = 0;
759. volt = get_limit_voltage(regulator_get_voltage(arm_regulator));
760. regulator_set_voltage(arm_regulator, volt, volt);
762. volt = get_limit_voltage(regulator_get_voltage(kfc_regulator));
763. regulator_set_voltage(kfc_regulator, volt, volt);
764. mutex_unlock(&cpufreq_lock);
766. return NOTIFY_OK;
767. }
769. static struct notifier_block exynos_tmu_nb = {
770. .notifier_call = exynos_cpufreq_tmu_notifier,
771. };
772. static int exynos_policy_notifier(struct notifier_block *nb,
773. unsigned long val, void *data)
774. {
775. struct cpufreq_policy *policy = data;
776. unsigned int cpu = policy->cpu;
778. if (val != CPUFREQ_ADJUST)
779. return 0;
781. if (!cpu_online(cpu))
782. return -EINVAL;
784. if (policy->max <= freq_max[CA7]) {
785. fake_policy[CA7][cpu].max = ACTUAL_FREQ(policy->max, CA7);
786. fake_policy[CA15][cpu].max = freq_max[CA15];
787. } else {
788. fake_policy[CA7][cpu].max = ACTUAL_FREQ(freq_max[CA7], CA7);
789. fake_policy[CA15][cpu].max = policy->max;
790. }
792. if (policy->min <= freq_max[CA7]) {
793. fake_policy[CA7][cpu].min = ACTUAL_FREQ(policy->min, CA7);
794. fake_policy[CA15][cpu].min = freq_min[CA15];
795. } else {
796. fake_policy[CA7][cpu].min = ACTUAL_FREQ(freq_min[CA7], CA7);
797. fake_policy[CA15][cpu].min = policy->min;
798. }
800. return 0;
801. }
803. static struct notifier_block notifier_policy_block = {
804. .notifier_call = exynos_policy_notifier,
805. };
807. static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
808. {
809. pr_debug("%s: cpu[%d]\n", __func__, policy->cpu);
810. policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu);
811. freqs[CA7]->old = exynos_getspeed_cluster(CA7);
812. freqs[CA15]->old = exynos_getspeed_cluster(CA15);
814. boot_freq = exynos_getspeed(policy->cpu);
816. cpufreq_frequency_table_get_attr(
817. merge_freq_table, policy->cpu);
819. /* set the transition latency value */
820. policy->cpuinfo.transition_latency = 100000;
822. cpumask_clear(policy->cpus);
823. cpumask_set_cpu(policy->cpu, policy->cpus);
825. return cpufreq_frequency_table_cpuinfo(
826. policy, merge_freq_table);
827. }
829. static struct cpufreq_driver exynos_driver = {
830. .flags = CPUFREQ_STICKY,
831. .verify = exynos_verify_speed,
832. .target = exynos_target,
833. .get = exynos_getspeed,
834. .init = exynos_cpufreq_cpu_init,
835. .name = "exynos_cpufreq",
836. #ifdef CONFIG_PM
837. .suspend = exynos_cpufreq_suspend,
838. .resume = exynos_cpufreq_resume,
839. #endif
841. };
843. /************************** sysfs interface ************************/
845. static ssize_t show_min_freq(struct kobject *kobj,
846. struct attribute *attr, char *buf)
847. {
848. return sprintf(buf, "%u\n", (unsigned int)pm_qos_request(PM_QOS_CPU_FREQ_MIN));
849. }
851. static ssize_t show_max_freq(struct kobject *kobj,
852. struct attribute *attr, char *buf)
853. {
854. return sprintf(buf, "%u\n", user_set_max_freq);
855. }
857. static ssize_t show_max_eagle_count(struct kobject *kobj,
858. struct attribute *attr, char *buf)
859. {
860. return sprintf(buf, "%u\n", user_set_eagle_count);
861. }
863. static ssize_t store_min_freq(struct kobject *kobj, struct attribute *attr,
864. const char *buf, size_t count)
865. {
866. int cpu;
867. unsigned int input;
868. struct cpufreq_policy *policy;
870. if (!sscanf(buf, "%u", &input))
871. return -EINVAL;
873. if (input > freq_max[CA15])
874. input = freq_max[CA15];
876. if (input <= freq_min[CA7]) {
877. if (pm_qos_request_active(&min_cpu_qos))
878. pm_qos_remove_request(&min_cpu_qos);
879. } else {
880. if (pm_qos_request_active(&min_cpu_qos))
881. pm_qos_update_request(&min_cpu_qos, input);
882. else
883. pm_qos_add_request(&min_cpu_qos, PM_QOS_CPU_FREQ_MIN, input);
884. }
886. for_each_online_cpu(cpu) {
887. policy = cpufreq_cpu_get(cpu);
888. if (policy)
889. exynos_target(policy, input, CPUFREQ_RELATION_L);
890. cpufreq_cpu_put(policy);
891. }
893. return count;
894. }
896. static ssize_t store_max_freq(struct kobject *kobj, struct attribute *attr,
897. const char *buf, size_t count)
898. {
899. int cpu;
900. unsigned int input;
901. struct cpufreq_policy *policy;
903. if (!sscanf(buf, "%u", &input))
904. return -EINVAL;
906. if (input > freq_max[CA15] || input <= 0)
907. input = freq_max[CA15];
909. user_set_max_freq = input;
911. for_each_online_cpu(cpu) {
912. policy = cpufreq_cpu_get(cpu);
913. if (policy) {
914. policy->user_policy.max = input;
915. cpufreq_update_policy(cpu);
916. }
917. cpufreq_cpu_put(policy);
918. }
920. return count;
921. }
923. static ssize_t store_max_eagle_count(struct kobject *kobj, struct attribute *attr,
924. const char *buf, size_t count)
925. {
926. unsigned int input;
928. if (!sscanf(buf, "%u", &input))
929. return -EINVAL;
931. input = (input > CPU_MAX_COUNT) ? CPU_MAX_COUNT : input;
932. input = (input < 0) ? 0 : input;
934. user_set_eagle_count = input;
936. return count;
937. }
939. define_one_global_rw(min_freq);
940. define_one_global_rw(max_freq);
941. define_one_global_rw(max_eagle_count);
943. static struct attribute *iks_attributes[] = {
944. &min_freq.attr,
945. &max_freq.attr,
946. &max_eagle_count.attr,
947. NULL
948. };
950. static struct attribute_group iks_attr_group = {
951. .attrs = iks_attributes,
952. .name = "iks-cpufreq",
953. };
955. /************************** sysfs end ************************/
957. static int exynos_cpufreq_reboot_notifier_call(struct notifier_block *this,
958. unsigned long code, void *_cmd)
959. {
960. unsigned int freqCA7, freqCA15;
961. unsigned int bootfreqCA7, bootfreqCA15;
962. int volt;
964. mutex_lock(&cpufreq_lock);
965. exynos_info[CA7]->blocked = true;
966. exynos_info[CA15]->blocked = true;
967. mutex_unlock(&cpufreq_lock);
969. bootfreqCA7 = VIRT_FREQ(get_boot_freq(CA7), CA7);
970. bootfreqCA15 = VIRT_FREQ(get_boot_freq(CA15), CA15);
972. freqCA7 = exynos_getspeed_cluster(CA7);
973. freqCA15 = exynos_getspeed_cluster(CA15);
975. volt = max(get_match_volt(ID_KFC, ACTUAL_FREQ(bootfreqCA7, CA7)),
976. get_match_volt(ID_KFC, ACTUAL_FREQ(freqCA7, CA7)));
977. volt = get_limit_voltage(volt);
979. if (regulator_set_voltage(kfc_regulator, volt, volt))
980. goto err;
982. volt = max(get_match_volt(ID_ARM, ACTUAL_FREQ(bootfreqCA15, CA15)),
983. get_match_volt(ID_ARM, ACTUAL_FREQ(freqCA15, CA15)));
984. volt = get_limit_voltage(volt);
986. if (regulator_set_voltage(arm_regulator, volt, volt))
987. goto err;
989. return NOTIFY_DONE;
990. err:
991. pr_err("%s: failed to set voltage\n", __func__);
993. return NOTIFY_BAD;
994. }
996. static struct notifier_block exynos_cpufreq_reboot_notifier = {
997. .notifier_call = exynos_cpufreq_reboot_notifier_call,
998. };
1000. static int exynos_qos_handler(struct notifier_block *b, unsigned long val, void *v)
1001. {
1002. int ret;
1003. unsigned int freq;
1004. cluster_type cluster;
1005. struct cpufreq_policy *policy;
1006. int cpu;
1008. if (val > freq_max[CA7]) {
1009. freq = exynos_getspeed_cluster(CA15);
1010. cluster = CA15;
1011. } else {
1012. freq = exynos_getspeed_cluster(CA7);
1013. cluster = CA7;
1014. }
1016. if (freq >= val || (cluster == CA7 && cpumask_empty(&cluster_cpus[CA7])))
1017. return NOTIFY_OK;
1019. if (cluster == CA15 && cpumask_empty(&cluster_cpus[CA15]))
1020. cpu = 0;
1021. else
1022. cpu = cpumask_first(&cluster_cpus[cluster]);
1024. policy = cpufreq_cpu_get(cpu);
1026. if (!policy)
1027. return NOTIFY_BAD;
1029. #if defined(CONFIG_CPU_FREQ_GOV_USERSPACE) || defined(CONFIG_CPU_FREQ_GOV_PERFORMANCE)
1030. if ((strcmp(policy->governor->name, "userspace") == 0)
1031. || strcmp(policy->governor->name, "performance") == 0)
1032. return NOTIFY_OK;
1033. #endif
1035. ret = cpufreq_driver_target(policy, val,
1036. CPUFREQ_RELATION_H);
1038. cpufreq_cpu_put(policy);
1040. if (ret < 0)
1041. return NOTIFY_BAD;
1043. return NOTIFY_OK;
1044. }
1046. static struct notifier_block exynos_qos_notifier = {
1047. .notifier_call = exynos_qos_handler,
1048. };
1050. static int __cpuinit exynos_hotplug_cpu_handler(struct notifier_block *nfb,
1051. unsigned long action, void *hcpu)
1052. {
1053. unsigned int cpu;
1054. unsigned int wakeup_cpu = (unsigned long)hcpu, max_freq;
1055. struct cpufreq_policy *policy;
1056. bool change_max = false;
1058. switch (action) {
1059. case CPU_ONLINE:
1060. if (!policy_max_freq)
1061. return NOTIFY_OK;
1063. if (num_online_cpus() < NR_CPUS) {
1064. /*
1065. * If policy.max of other cores are changed,
1066. * set the wakeup core's policy.max to same value
1067. */
1068. policy = cpufreq_cpu_get(wakeup_cpu);
1069. if (!policy)
1070. return NOTIFY_BAD;
1072. if (policy->max != policy_max_freq) {
1073. policy->user_policy.max = policy_max_freq;
1074. cpufreq_update_policy(wakeup_cpu);
1075. }
1076. cpufreq_cpu_put(policy);
1077. } else {
1078. /* All cores wake up, restore the policy.max to original */
1079. for_each_online_cpu(cpu) {
1080. policy = cpufreq_cpu_get(cpu);
1081. if (!policy)
1082. return NOTIFY_BAD;
1084. if (policy->max != policy_max_freq) {
1085. policy->user_policy.max = policy_max_freq;
1086. pr_info("IKS-CPUFREQ: Restore cpu%d max_freq [%d] -> [%d]\n",
1087. cpu, policy->max, policy_max_freq);
1089. cpufreq_update_policy(cpu);
1090. }
1091. cpufreq_cpu_put(policy);
1092. }
1093. policy_max_freq = 0;
1094. }
1095. break;
1096. case CPU_UP_PREPARE:
1097. if (per_cpu(cpu_cur_cluster, wakeup_cpu) == CA15) {
1098. policy = cpufreq_cpu_get(smp_processor_id());
1099. if (!policy)
1100. return NOTIFY_BAD;
1102. max_freq = exynos_info[CA15]->max_op_freqs[get_num_CA15() + 1];
1103. if (policy->max > max_freq) {
1104. change_max = true;
1105. if (!policy_max_freq)
1106. policy_max_freq = policy->max;
1107. }
1108. cpufreq_cpu_put(policy);
1110. if (change_max) {
1111. for_each_online_cpu(cpu) {
1112. policy = cpufreq_cpu_get(cpu);
1113. if (!policy)
1114. return NOTIFY_BAD;
1116. policy->user_policy.max = max_freq;
1117. pr_info("IKS-CPUFREQ: Change cpu%d max_freq [%d] -> [%d]\n",
1118. cpu, policy->max, max_freq);
1119. cpufreq_update_policy(cpu);
1120. cpufreq_cpu_put(policy);
1121. }
1122. }
1123. }
1124. break;
1125. }
1127. return NOTIFY_OK;
1128. }
1130. static struct notifier_block __cpuinitdata exynos_hotplug_cpu_notifier = {
1131. .notifier_call = exynos_hotplug_cpu_handler,
1132. };
1134. static int __init exynos_cpufreq_init(void)
1135. {
1136. int ret = -EINVAL;
1137. int cpu;
1139. boot_cluster = 0;
1141. exynos_info[CA7] = kzalloc(sizeof(struct exynos_dvfs_info), GFP_KERNEL);
1142. if (!exynos_info[CA7]) {
1143. ret = -ENOMEM;
1144. goto err_alloc_info_CA7;
1145. }
1147. exynos_info[CA15] = kzalloc(sizeof(struct exynos_dvfs_info), GFP_KERNEL);
1148. if (!exynos_info[CA15]) {
1149. ret = -ENOMEM;
1150. goto err_alloc_info_CA15;
1151. }
1153. freqs[CA7] = kzalloc(sizeof(struct cpufreq_freqs), GFP_KERNEL);
1154. if (!freqs[CA7]) {
1155. ret = -ENOMEM;
1156. goto err_alloc_freqs_CA7;
1157. }
1159. freqs[CA15] = kzalloc(sizeof(struct cpufreq_freqs), GFP_KERNEL);
1160. if (!freqs[CA15]) {
1161. ret = -ENOMEM;
1162. goto err_alloc_freqs_CA15;
1163. }
1165. /* Get to boot_cluster_num - 0 for CA7; 1 for CA15 */
1166. boot_cluster = !(read_cpuid(CPUID_MPIDR) >> 8 & 0xf);
1167. pr_debug("%s: boot_cluster is %s\n", __func__,
1168. boot_cluster == CA7 ? "CA7" : "CA15");
1170. init_cpumask_cluster_set(boot_cluster);
1172. ret = exynos5410_cpufreq_CA7_init(&exynos_info_CA7);
1173. if (ret)
1174. goto err_init_cpufreq;
1176. ret = exynos5410_cpufreq_CA15_init(&exynos_info_CA15);
1177. if (ret)
1178. goto err_init_cpufreq;
1180. arm_regulator = regulator_get(NULL, "vdd_arm");
1181. if (IS_ERR(arm_regulator)) {
1182. pr_err("%s: failed to get resource vdd_arm\n", __func__);
1183. goto err_vdd_arm;
1184. }
1186. kfc_regulator = regulator_get(NULL, "vdd_kfc");
1187. if (IS_ERR(kfc_regulator)) {
1188. pr_err("%s:failed to get resource vdd_kfc\n", __func__);
1189. goto err_vdd_kfc;
1190. }
1192. memcpy(exynos_info[CA7], &exynos_info_CA7,
1193. sizeof(struct exynos_dvfs_info));
1194. exynos_info[CA7]->regulator = kfc_regulator;
1196. memcpy(exynos_info[CA15], &exynos_info_CA15,
1197. sizeof(struct exynos_dvfs_info));
1198. exynos_info[CA15]->regulator = arm_regulator;
1200. if (exynos_info[CA7]->set_freq == NULL) {
1201. pr_err("%s: No set_freq function (ERR)\n", __func__);
1202. goto err_set_freq;
1203. }
1205. freq_max[CA15] = exynos_info[CA15]->
1206. freq_table[exynos_info[CA15]->max_support_idx].frequency;
1207. freq_min[CA15] = exynos_info[CA15]->
1208. freq_table[exynos_info[CA15]->min_support_idx].frequency;
1209. freq_max[CA7] = VIRT_FREQ(exynos_info[CA7]->
1210. freq_table[exynos_info[CA7]->max_support_idx].frequency, CA7);
1211. freq_min[CA7] = VIRT_FREQ(exynos_info[CA7]->
1212. freq_table[exynos_info[CA7]->min_support_idx].frequency, CA7);
1214. cpufreq_merge_tables();
1216. set_boot_freq();
1218. register_pm_notifier(&exynos_cpufreq_nb);
1219. register_reboot_notifier(&exynos_cpufreq_reboot_notifier);
1220. exynos_tmu_add_notifier(&exynos_tmu_nb);
1221. pm_qos_add_notifier(PM_QOS_CPU_FREQ_MIN, &exynos_qos_notifier);
1223. for_each_cpu(cpu, cpu_possible_mask) {
1224. fake_policy[CA15][cpu].cpu = cpu;
1225. fake_policy[CA15][cpu].max = freq_max[CA15];
1226. fake_policy[CA15][cpu].min = freq_min[CA15];
1227. fake_policy[CA7][cpu].max = ACTUAL_FREQ(freq_max[CA7], CA7);
1228. fake_policy[CA7][cpu].min = ACTUAL_FREQ(freq_min[CA7], CA7);
1229. }
1231. cpufreq_register_notifier(&notifier_policy_block, CPUFREQ_POLICY_NOTIFIER);
1233. if (cpufreq_register_driver(&exynos_driver)) {
1234. pr_err("%s: failed to register cpufreq driver\n", __func__);
1235. goto err_cpufreq;
1236. }
1238. register_cpu_notifier(&exynos_hotplug_cpu_notifier);
1240. user_set_eagle_count = CPU_MAX_COUNT;
1241. user_set_max_freq = freq_max[CA15];
1242. pm_qos_add_request(&min_cpu_qos, PM_QOS_CPU_FREQ_MIN, freq_min[CA7]);
1244. ret = sysfs_create_group(cpufreq_global_kobject, &iks_attr_group);
1245. if (ret) {
1246. pr_err("%s: failed to create iks-cpufreq sysfs interface\n", __func__);
1247. goto err_cpufreq;
1248. }
1250. pm_qos_add_request(&boot_cpu_qos, PM_QOS_CPU_FREQ_MIN, 0);
1251. pm_qos_update_request_timeout(&boot_cpu_qos, 1200000, 60000 * 1000);
1253. exynos_cpufreq_init_done = true;
1255. return 0;
1257. err_cpufreq:
1258. unregister_pm_notifier(&exynos_cpufreq_nb);
1259. err_set_freq:
1260. regulator_put(kfc_regulator);
1261. err_vdd_kfc:
1262. if (!IS_ERR(kfc_regulator))
1263. regulator_put(kfc_regulator);
1264. err_vdd_arm:
1265. if (!IS_ERR(arm_regulator))
1266. regulator_put(arm_regulator);
1267. err_init_cpufreq:
1268. kfree(freqs[CA15]);
1269. err_alloc_freqs_CA15:
1270. kfree(freqs[CA7]);
1271. err_alloc_freqs_CA7:
1272. kfree(exynos_info[CA15]);
1273. err_alloc_info_CA15:
1274. kfree(exynos_info[CA7]);
1275. err_alloc_info_CA7:
1276. pr_err("%s: failed initialization\n", __func__);
1278. return ret;
1279. }
1281. late_initcall(exynos_cpufreq_init);