1. U-Boot SPL 2013.10 (Nov 13 2013 - 14:30:10)
  2. OMAP4430 ES2.2
  3. reading u-boot.img
  4. reading u-boot.img
  7. U-Boot 2013.10 (Nov 13 2013 - 14:30:10)
  9. CPU : OMAP4430 ES2.2
  10. Board: OMAP4 Panda
  11. I2C: ready
  12. DRAM: 1 GiB
  13. MMC: OMAP SD/MMC: 0
  14. Using default environment
  16. In: serial
  17. Out: serial
  18. Err: serial
  19. Net: No ethernet found.
  20. Hit any key to stop autoboot: 3 2 1 0
  21. mmc0 is current device
  22. SD/MMC found on device 0
  23. reading boot.scr
  24. 255 bytes read in 2 ms (124 KiB/s)
  25. Running bootscript from mmc0 ...
  26. ## Executing script at 82000000
  27. reading uImage
  28. 4591935 bytes read in 219 ms (20 MiB/s)
  29. ## Booting kernel from Legacy Image at 80000000 ...
  30. Image Name: Linux-3.13.0-rc8-00219-gff4f3eb
  31. Image Type: ARM Linux Kernel Image (uncompressed)
  32. Data Size: 4591871 Bytes = 4.4 MiB
  33. Load Address: 80008000
  34. Entry Point: 80008000
  35. Verifying Checksum ... OK
  36. Loading Kernel Image ... OK
  38. Starting kernel ...
  40. [ 0.000000] Booting Linux on physical CPU 0x0
  41. [ 0.000000] Linux version 3.13.0-rc8-00219-gff4f3eb (suman@Irmo) (gcc version 4.6.3 (Sourcery CodeBench Lite 2012.03-57) ) #1 SMP Mon Jan 13 13:57:34 CST 2014
  42. [ 0.000000] CPU: ARMv7 Processor [411fc092] revision 2 (ARMv7), cr=10c53c7d
  43. [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
  44. [ 0.000000] Machine model: TI OMAP4 PandaBoard
  45. [ 0.000000] memblock_reserve: [0x00000080008400-0x00000080e1fd28] arm_memblock_init+0x4c/0x1b8
  46. [ 0.000000] memblock_reserve: [0x00000080004000-0x00000080008000] arm_memblock_init+0x130/0x1b8
  47. [ 0.000000] memblock_reserve: [0x00000080e206a0-0x00000080e2c8c8] arm_dt_memblock_reserve+0x24/0x74
  48. [ 0.000000] memblock_reserve: [0x000000bff00000-0x000000c0000000] memblock_alloc_base_nid+0x68/0x84
  49. [ 0.000000] memblock_free: [0x000000bff00000-0x000000c0000000] arm_memblock_steal+0x30/0x48
  50. [ 0.000000] memblock_reserve: [0x000000ae800000-0x000000af800000] memblock_alloc_base_nid+0x68/0x84
  51. [ 0.000000] cma: CMA: reserved 16 MiB at ae800000
  52. [ 0.000000] MEMBLOCK configuration:
  53. [ 0.000000] memory size = 0x3ff00000 reserved size = 0x1e27b50
  54. [ 0.000000] memory.cnt = 0x1
  55. [ 0.000000] memory[0x0] [0x00000080000000-0x000000bfefffff], 0x3ff00000 bytes
  56. [ 0.000000] reserved.cnt = 0x4
  57. [ 0.000000] reserved[0x0] [0x00000080004000-0x00000080007fff], 0x4000 bytes
  58. [ 0.000000] reserved[0x1] [0x00000080008400-0x00000080e1fd27], 0xe17928 bytes
  59. [ 0.000000] reserved[0x2] [0x00000080e206a0-0x00000080e2c8c7], 0xc228 bytes
  60. [ 0.000000] reserved[0x3] [0x000000ae800000-0x000000af7fffff], 0x1000000 bytes
  61. [ 0.000000] Memory policy: Data cache writealloc
  62. [ 0.000000] memblock_reserve: [0x000000ae7fffd8-0x000000ae800000] memblock_alloc_base_nid+0x68/0x84
  63. [ 0.000000] memblock_reserve: [0x000000ae7fe000-0x000000ae7ff000] memblock_alloc_base_nid+0x68/0x84
  64. [ 0.000000] memblock_reserve: [0x000000ae7fd000-0x000000ae7fe000] memblock_alloc_base_nid+0x68/0x84
  65. [ 0.000000] memblock_reserve: [0x000000ae7fc000-0x000000ae7fd000] memblock_alloc_base_nid+0x68/0x84
  66. [ 0.000000] memblock_reserve: [0x000000ae7fb000-0x000000ae7fc000] memblock_alloc_base_nid+0x68/0x84
  67. [ 0.000000] memblock_reserve: [0x000000ae7fa000-0x000000ae7fb000] memblock_alloc_base_nid+0x68/0x84
  68. [ 0.000000] memblock_reserve: [0x000000ae7f9000-0x000000ae7fa000] memblock_alloc_base_nid+0x68/0x84
  69. [ 0.000000] memblock_reserve: [0x000000ae7f8000-0x000000ae7f9000] memblock_alloc_base_nid+0x68/0x84
  70. [ 0.000000] memblock_reserve: [0x000000ae7f7000-0x000000ae7f8000] memblock_alloc_base_nid+0x68/0x84
  71. [ 0.000000] memblock_reserve: [0x000000ae7f4000-0x000000ae7f6000] memblock_alloc_base_nid+0x68/0x84
  72. [ 0.000000] memblock_reserve: [0x000000ae7f6000-0x000000ae7f7000] memblock_alloc_base_nid+0x68/0x84
  73. [ 0.000000] memblock_reserve: [0x000000ae7fff60-0x000000ae7fffd8] memblock_alloc_base_nid+0x68/0x84
  74. [ 0.000000] memblock_reserve: [0x000000ae7fff38-0x000000ae7fff60] memblock_alloc_base_nid+0x68/0x84
  75. [ 0.000000] memblock_reserve: [0x000000ae7f3000-0x000000ae7f4000] memblock_alloc_base_nid+0x68/0x84
  76. [ 0.000000] memblock_reserve: [0x000000ae7f2000-0x000000ae7f3000] memblock_alloc_base_nid+0x68/0x84
  77. [ 0.000000] memblock_reserve: [0x000000ae7ec000-0x000000ae7f2000] memblock_alloc_base_nid+0x68/0x84
  78. [ 0.000000] OMAP4430 ES2.2
  79. [ 0.000000] PERCPU: Embedded 9 pages/cpu @c1657000 s13952 r8192 d14720 u36864
  80. [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260368
  81. [ 0.000000] Kernel command line: rw vram=32M fixrtc mem=1G@0x80000000 root=/dev/mmcblk0p2 console=ttyO2,115200n8 rootwait earlyprintk memblock=debug
  82. [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
  83. [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
  84. [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
  85. [ 0.000000] Memory: 1007392K/1047552K available (5877K kernel code, 600K rwdata, 2076K rodata, 341K init, 5527K bss, 40160K reserved, 269312K highmem)
  86. [ 0.000000] Virtual kernel memory layout:
  87. [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
  88. [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
  89. [ 0.000000] vmalloc : 0xf0000000 - 0xff000000 ( 240 MB)
  90. [ 0.000000] lowmem : 0xc0000000 - 0xef800000 ( 760 MB)
  91. [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
  92. [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
  93. [ 0.000000] .text : 0xc0008000 - 0xc07cca54 (7955 kB)
  94. [ 0.000000] .init : 0xc07cd000 - 0xc0822680 ( 342 kB)
  95. [ 0.000000] .data : 0xc0824000 - 0xc08ba100 ( 601 kB)
  96. [ 0.000000] .bss : 0xc08ba100 - 0xc0e1fd28 (5528 kB)
  97. [ 0.000000] Hierarchical RCU implementation.
  98. [ 0.000000] NR_IRQS:16 nr_irqs:16 16
  99. [ 0.000000] ti_dt_clocks_register: failed to lookup clock node div_ts_ck
  100. [ 0.000000] ti_dt_clocks_register: failed to lookup clock node bandgap_ts_fclk
  101. [ 0.000000] OMAP clockevent source: timer1 at 32768 Hz
  102. [ 0.000000] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 65536000000000ns
  103. [ 0.000000] OMAP clocksource: 32k_counter at 32768 Hz
  104. [ 0.000000] smp_twd: clock not found -2
  105. [ 0.000000] Console: colour dummy device 80x30
  106. [ 0.000000] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
  107. [ 0.000000] ... MAX_LOCKDEP_SUBCLASSES: 8
  108. [ 0.000000] ... MAX_LOCK_DEPTH: 48
  109. [ 0.000000] ... MAX_LOCKDEP_KEYS: 8191
  110. [ 0.000000] ... CLASSHASH_SIZE: 4096
  111. [ 0.000000] ... MAX_LOCKDEP_ENTRIES: 16384
  112. [ 0.000000] ... MAX_LOCKDEP_CHAINS: 32768
  113. [ 0.000000] ... CHAINHASH_SIZE: 16384
  114. [ 0.000000] memory used by lock dependency info: 3695 kB
  115. [ 0.000000] per task-struct memory footprint: 1152 bytes
  116. [ 0.000000] Calibrating local timer... 297.31MHz.
  117. [ 0.058288] Calibrating delay loop... 1185.38 BogoMIPS (lpj=5926912)
  118. [ 0.137664] pid_max: default: 32768 minimum: 301
  119. [ 0.138336] Security Framework initialized
  120. [ 0.138549] Mount-cache hash table entries: 512
  121. [ 0.177764] CPU: Testing write buffer coherency: ok
  122. [ 0.179779] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
  123. [ 0.179870] Setting up static identity map for 0x80595180 - 0x805951f0
  124. [ 0.180023] L310 cache controller enabled
  125. [ 0.180053] l2x0: 16 ways, CACHE_ID 0x410000c4, AUX_CTRL 0x7e470000, Cache size: 1024 kB
  126. [ 0.186340] CPU1: Booted secondary processor
  127. [ 0.216857] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
  128. [ 0.217620] Brought up 2 CPUs
  129. [ 0.217651] SMP: Total of 2 processors activated.
  130. [ 0.217651] CPU: All CPU(s) started in SVC mode.
  131. [ 0.220947] devtmpfs: initialized
  132. [ 0.231567] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 1
  133. [ 0.236450] omap_hwmod: l3_main_3 using broken dt data from ocp
  134. [ 0.240936] omap_hwmod: l3_main_2 using broken dt data from ocp
  135. [ 0.425018] pinctrl core: initialized pinctrl subsystem
  136. [ 0.428924] regulator-dummy: no parameters
  137. [ 0.432739] NET: Registered protocol family 16
  138. [ 0.440460] DMA: preallocated 256 KiB pool for atomic coherent allocations
  139. [ 0.535766] OMAP GPIO hardware version 0.1
  140. [ 0.550933] omap-gpmc 50000000.gpmc: GPMC revision 6.0
  141. [ 0.580017] platform 4b501000.aes: Cannot lookup hwmod 'aes'
  142. [ 0.580749] platform 480a5000.des: Cannot lookup hwmod 'des'
  143. [ 0.592437] No ATAGs?
  144. [ 0.592498] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
  145. [ 0.592498] hw-breakpoint: maximum watchpoint size is 4 bytes.
  146. [ 0.597106] OMAP DMA hardware revision 0.0
  147. [ 0.600830] ARM PMU: not yet supported on OMAP4430 due to missing CTI driver
  148. [ 0.656829] bio: create slab <bio-0> at 0
  149. [ 0.660491] edma-dma-engine edma-dma-engine.0: Can't allocate PaRAM dummy slot
  150. [ 0.660552] edma-dma-engine: probe of edma-dma-engine.0 failed with error -5
  151. [ 0.728546] omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver
  152. [ 0.730957] hsusb1_vbus: 3300 mV
  153. [ 0.731567] reg-fixed-voltage wl12xx_vmmc.10: could not find pctldev for node /ocp/pinmux@4a100040/pinmux_wl12xx_gpio, deferring probe
  154. [ 0.731597] platform wl12xx_vmmc.10: Driver reg-fixed-voltage requests probe deferral
  155. [ 0.739990] SCSI subsystem initialized
  156. [ 0.743194] usbcore: registered new interface driver usbfs
  157. [ 0.743591] usbcore: registered new interface driver hub
  158. [ 0.744110] usbcore: registered new device driver usb
  159. [ 0.748260] omap_i2c 48070000.i2c: could not find pctldev for node /ocp/pinmux@4a100040/pinmux_i2c1_pins, deferring probe
  160. [ 0.748291] platform 48070000.i2c: Driver omap_i2c requests probe deferral
  161. [ 0.748382] omap_i2c 48072000.i2c: could not find pctldev for node /ocp/pinmux@4a100040/pinmux_i2c2_pins, deferring probe
  162. [ 0.748413] platform 48072000.i2c: Driver omap_i2c requests probe deferral
  163. [ 0.748474] omap_i2c 48060000.i2c: could not find pctldev for node /ocp/pinmux@4a100040/pinmux_i2c3_pins, deferring probe
  164. [ 0.748504] platform 48060000.i2c: Driver omap_i2c requests probe deferral
  165. [ 0.748596] omap_i2c 48350000.i2c: could not find pctldev for node /ocp/pinmux@4a100040/pinmux_i2c4_pins, deferring probe
  166. [ 0.748626] platform 48350000.i2c: Driver omap_i2c requests probe deferral
  167. [ 0.755767] Switched to clocksource 32k_counter
  168. [ 0.905944] NET: Registered protocol family 2
  169. [ 0.908081] TCP established hash table entries: 8192 (order: 3, 32768 bytes)
  170. [ 0.908416] TCP bind hash table entries: 8192 (order: 6, 294912 bytes)
  171. [ 0.911865] TCP: Hash tables configured (established 8192 bind 8192)
  172. [ 0.912170] TCP: reno registered
  173. [ 0.912200] UDP hash table entries: 512 (order: 3, 40960 bytes)
  174. [ 0.912689] UDP-Lite hash table entries: 512 (order: 3, 40960 bytes)
  175. [ 0.914337] NET: Registered protocol family 1
  176. [ 0.915985] RPC: Registered named UNIX socket transport module.
  177. [ 0.915985] RPC: Registered udp transport module.
  178. [ 0.916015] RPC: Registered tcp transport module.
  179. [ 0.916015] RPC: Registered tcp NFSv4.1 backchannel transport module.
  180. [ 1.115661] bounce pool size: 64 pages
  181. [ 1.116943] VFS: Disk quotas dquot_6.5.2
  182. [ 1.117279] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
  183. [ 1.120056] NFS: Registering the id_resolver key type
  184. [ 1.120483] Key type id_resolver registered
  185. [ 1.120513] Key type id_legacy registered
  186. [ 1.120635] jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc.
  187. [ 1.121276] msgmni has been set to 1473
  188. [ 1.125274] io scheduler noop registered
  189. [ 1.125305] io scheduler deadline registered
  190. [ 1.125396] io scheduler cfq registered (default)
  191. [ 1.133270] pinctrl-single 4a100040.pinmux: 203 pins at pa fc100040 size 406
  192. [ 1.133911] pinctrl-single 4a31e040.pinmux: 28 pins at pa fc31e040 size 56
  193. [ 1.138183] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
  194. [ 1.146728] 4806a000.serial: ttyO0 at MMIO 0x4806a000 (irq = 104, base_baud = 3000000) is a OMAP UART0
  195. [ 1.149566] 4806c000.serial: ttyO1 at MMIO 0x4806c000 (irq = 105, base_baud = 3000000) is a OMAP UART1
  196. [ 1.151275] 48020000.serial: ttyO2 at MMIO 0x48020000 (irq = 106, base_baud = 3000000) is a OMAP UART2
  197. [ 2.208923] console [ttyO2] enabled
  198. [ 2.214202] 4806e000.serial: ttyO3 at MMIO 0x4806e000 (irq = 102, base_baud = 3000000) is a OMAP UART3
  199. [ 2.253509] brd: module loaded
  200. [ 2.273651] loop: module loaded
  201. [ 2.283050] mtdoops: mtd device (mtddev=name/number) must be supplied
  202. [ 2.303649] usbcore: registered new interface driver asix
  203. [ 2.309783] usbcore: registered new interface driver ax88179_178a
  204. [ 2.316589] usbcore: registered new interface driver cdc_ether
  205. [ 2.323120] usbcore: registered new interface driver r815x
  206. [ 2.329345] usbcore: registered new interface driver smsc95xx
  207. [ 2.336181] usbcore: registered new interface driver net1080
  208. [ 2.342529] usbcore: registered new interface driver cdc_subset
  209. [ 2.349151] usbcore: registered new interface driver zaurus
  210. [ 2.355468] usbcore: registered new interface driver cdc_ncm
  211. [ 2.363220] usbcore: registered new interface driver cdc_wdm
  212. [ 2.369628] usbcore: registered new interface driver usb-storage
  213. [ 2.376434] usbcore: registered new interface driver usbtest
  214. [ 2.384857] mousedev: PS/2 mouse device common for all mice
  215. [ 2.395996] i2c /dev entries driver
  216. [ 2.400054] Driver for 1-wire Dallas network protocol.
  217. [ 2.407165] ti-soc-thermal 4a002260.bandgap: Non-trimmed BGAP, Temp not accurate
  218. [ 2.418609] omap_wdt: OMAP Watchdog Timer Rev 0x00: initial timeout 60 sec
  219. [ 2.429321] omap-dma-engine 4a056000.dma-controller: allocating channel for 62
  220. [ 2.437103] omap-dma-engine 4a056000.dma-controller: allocating channel for 61
  221. [ 2.444793] omap_hsmmc 4809c000.mmc: vmmc regulator missing
  222. [ 2.450988] omap-dma-engine 4a056000.dma-controller: freeing channel for 61
  223. [ 2.458374] omap-dma-engine 4a056000.dma-controller: freeing channel for 62
  224. [ 2.465820] platform 4809c000.mmc: Driver omap_hsmmc requests probe deferral
  225. [ 2.473754] omap-dma-engine 4a056000.dma-controller: allocating channel for 60
  226. [ 2.481445] omap-dma-engine 4a056000.dma-controller: allocating channel for 59
  227. [ 2.489196] omap_hsmmc 480d5000.mmc: vmmc regulator missing
  228. [ 2.495086] omap-dma-engine 4a056000.dma-controller: freeing channel for 59
  229. [ 2.502441] omap-dma-engine 4a056000.dma-controller: freeing channel for 60
  230. [ 2.509948] platform 480d5000.mmc: Driver omap_hsmmc requests probe deferral
  231. [ 2.519134] usbcore: registered new interface driver usbhid
  232. [ 2.524993] usbhid: USB HID core driver
  233. [ 2.531188] oprofile: no performance counters
  234. [ 2.537475] oprofile: using timer interrupt.
  235. [ 2.542633] TCP: cubic registered
  236. [ 2.546173] Initializing XFRM netlink socket
  237. [ 2.550811] NET: Registered protocol family 17
  238. [ 2.555572] NET: Registered protocol family 15
  239. [ 2.560607] Key type dns_resolver registered
  240. [ 2.566772] Power Management for TI OMAP4+ devices.
  241. [ 2.571990] Power Management for TI OMAP4.
  242. [ 2.576354] OMAP4 PM: u-boot >= v2012.07 is required for full PM support
  243. [ 2.583587] ThumbEE CPU extension supported.
  244. [ 2.594177] vwl1271: 1800 mV
  245. [ 2.607299] Skipping twl internal clock init and using bootloader value (unknown osc rate)
  246. [ 2.618408] twl 0-0048: PIH (irq 39) nested IRQs
  247. [ 2.625701] twl_rtc rtc.11: Power up reset detected.
  248. [ 2.631988] twl_rtc rtc.11: Enabling TWL-RTC
  249. [ 2.642242] twl_rtc rtc.11: rtc core: registered rtc.11 as rtc0
  250. [ 2.651489] VAUX1_6030: 1000 <--> 3000 mV at 1800 mV
  251. [ 2.659606] VAUX2_6030: 1200 <--> 2800 mV at 1800 mV
  252. [ 2.667358] VAUX3_6030: 1000 <--> 3000 mV at 1200 mV
  253. [ 2.674987] VMMC: 1200 <--> 3000 mV at 3000 mV
  254. [ 2.682189] VPP: 1800 <--> 2500 mV at 1900 mV
  255. [ 2.689300] VUSIM: 1200 <--> 2900 mV at 1800 mV
  256. [ 2.696319] VDAC: 1800 mV
  257. [ 2.700988] VANA: 2100 mV
  258. [ 2.706329] VCXIO: 1800 mV
  259. [ 2.710998] VUSB: 3300 mV
  260. [ 2.716186] V1V8: 1800 mV
  261. [ 2.721160] V2V1: 2100 mV
  262. [ 2.737609] omap_i2c 48070000.i2c: bus 0 rev0.10 at 400 kHz
  263. [ 2.746795] omap_i2c 48072000.i2c: bus 1 rev0.10 at 400 kHz
  264. [ 2.756103] omap_i2c 48060000.i2c: bus 2 rev0.10 at 100 kHz
  265. [ 2.764068] omap_i2c 48350000.i2c: bus 3 rev0.10 at 400 kHz
  266. [ 2.770721] omap-dma-engine 4a056000.dma-controller: allocating channel for 62
  267. [ 2.778656] omap-dma-engine 4a056000.dma-controller: allocating channel for 61
  268. [ 2.786926] 4809c000.mmc supply vmmc_aux not found, using dummy regulator
  269. [ 2.796997] omap_hsmmc 4809c000.mmc: pins are not configured from the driver
  270. [ 2.856414] omap-dma-engine 4a056000.dma-controller: allocating channel for 60
  271. [ 2.863983] omap-dma-engine 4a056000.dma-controller: allocating channel for 59
  272. [ 2.871704] 480d5000.mmc supply vmmc_aux not found, using dummy regulator
  273. [ 2.934143] mmc0: host does not support reading read-only switch. assuming write-enable.
  274. [ 2.945007] mmc0: new high speed SD card at address 2d3d
  275. [ 2.952484] isa bounce pool size: 16 pages
  276. [ 2.958343] mmcblk0: mmc0:2d3d SD02G 1.87 GiB
  277. [ 2.969543] mmcblk0: p1 p2
  278. [ 3.092437] twl_rtc rtc.11: setting system clock to 2000-01-01 00:00:00 UTC (946684800)
  279. [ 3.145690] omap_uart 48020000.serial: no wakeirq for uart2
  280. [ 3.157745] EXT3-fs (mmcblk0p2): error: couldn't mount because of unsupported optional features (240)
  281. [ 3.171600] EXT2-fs (mmcblk0p2): error: couldn't mount because of unsupported optional features (240)
  282. [ 3.198608] EXT4-fs (mmcblk0p2): warning: maximal mount count reached, running e2fsck is recommended
  283. [ 3.344482] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
  284. [ 3.353912] VFS: Mounted root (ext4 filesystem) on device 179:2.
  285. [ 3.362091] devtmpfs: mounted
  286. [ 3.366516] Freeing unused kernel memory: 340K (c07cd000 - c0822000)
  287. Starting mdev...
  288. Fix /dev/snd issue...
  289. Setting mdev as uevent helper...
  290. / #
  291. / # vi /bin/mhw/ # vi /bin/hwlock_multi
  292. #!/bin/sh
  293. # Run test multiple times
  294. #
  296. insmod /rpmsg/hwspinlock_core.ko
  297. for i in `seq 1 50`
  298. #for i in `seq 1 1000`
  299. do
  300. echo "Probe # " $i
  301. #insmod /rpmsg/hwspinlock_core.ko
  302. insmod /rpmsg/omap_hwspinlock.ko
  303. lsmod
  304. echo "Release # " $i
  305. rmmod omap_hwspinlock.ko
  306. #rmmod hwspinlock_core.ko
  307. done
  308. rmmod hwspinlock_core.ko
  310. ~
  311. ~
  312. ~
  313. ~
  314. ~
  315. ~
  316. ~
  317. ~
  318. ~
  319. ~
  320. ~
  321. ~
  322. ~
  323. ~
  324. ~
  325. ~
  326. ~
  327. ~
  328. ~
  329. ~
  330. ~
  331. ~
  332. ~
  333. ~
  334. ~
  335. ~
  336. ~
  337. ~
  338. ~
  339. ~
  340. ~
  341. ~
  342. ~
  343. ~
  344. ~
  345. ~
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  351. ~
  352. ~
  353. ~
  354. ~
  355. ~
  356. ~- /bin/hwlock_multi 1/18 5%
  357. - /bin/hwlock_multi 2/18 11%
  358. - /bin/hwlock_multi 3/18 16%
  359. - /bin/hwlock_multi 4/18 22%
  360. - /bin/hwlock_multi 5/18 27%
  361. - /bin/hwlock_multi 6/18 33%
  362. - /bin/hwlock_multi 7/18 38%
  363. - /bin/hwlock_multi 8/18 44%
  364. - /bin/hwlock_multi 9/18 50%- /bin/hwlock_multi 8/18 44%- /bin/hwlock_multi 7/18 38%- /bin/hwlock_multi 6/18 33%- /bin/hwlock_multi 5/18 27%- /bin/hwlock_multi 5/18 27%I /bin/hwlock_multi 5/18 27%#insmod /rpmsg/hwspinlock_core.ko#I /bin/hwlock_multi [Modified] 5/18 27%
  365. fI /bin/hwlock_multi [Modified] 6/18 33%
  366. #I /bin/hwlock_multi [Modified] 7/18 38%
  367. dI /bin/hwlock_multi [Modified] 8/18 44%
  368. eI /bin/hwlock_multi [Modified] 9/18 50%
  369. #I /bin/hwlock_multi [Modified] 10/18 55%insmod /rpmsg/hwspinlock_core.ko
  370. I /bin/hwlock_multi [Modified] 11/18 61%
  371. I /bin/hwlock_multi [Modified] 12/18 66%
  372. I /bin/hwlock_multi [Modified] 13/18 72%
  373. I /bin/hwlock_multi [Modified] 14/18 77%
  374. I /bin/hwlock_multi [Modified] 15/18 83%#rmmod hwspinlock_core.ko
  375. I /bin/hwlock_multi [Modified] 16/18 88%
  376. I /bin/hwlock_multi [Modified] 17/18 94%#rmmod hwspinlock_core.ko#- /bin/hwlock_multi [Modified] 17/18 94%:x"/bin/hwlock_multi" 18L, 313C/ # c
  377. /bin/sh: c: not found
  378. / # sync
  379. / #
  380. / # lsmod
  381. Module Size Used by Not tainted
  382. / # hwmllock_m/ # hwlock_multi
  383. Probe # 1
  384. [ 49.569427] random: nonblocking pool is initialized
  385. Module Size Used by Not tainted
  386. omap_hwspinlock 2500 0
  387. hwspinlock_core 9346 1 omap_hwspinlock
  388. Release # 1
  389. Probe # 2
  390. Module Size Used by Not tainted
  391. omap_hwspinlock 2500 0
  392. hwspinlock_core 9346 1 omap_hwspinlock
  393. Release # 2
  394. Probe # 3
  395. Module Size Used by Not tainted
  396. omap_hwspinlock 2500 0
  397. hwspinlock_core 9346 1 omap_hwspinlock
  398. Release # 3
  399. Probe # 4
  400. Module Size Used by Not tainted
  401. omap_hwspinlock 2500 0
  402. hwspinlock_core 9346 1 omap_hwspinlock
  403. Release # 4
  404. Probe # 5
  405. Module Size Used by Not tainted
  406. omap_hwspinlock 2500 0
  407. hwspinlock_core 9346 1 omap_hwspinlock
  408. Release # 5
  409. Probe # 6
  410. Module Size Used by Not tainted
  411. omap_hwspinlock 2500 0
  412. hwspinlock_core 9346 1 omap_hwspinlock
  413. Release # 6
  414. Probe # 7
  415. Module Size Used by Not tainted
  416. omap_hwspinlock 2500 0
  417. hwspinlock_core 9346 1 omap_hwspinlock
  418. Release # 7
  419. Probe # 8
  420. Module Size Used by Not tainted
  421. omap_hwspinlock 2500 0
  422. hwspinlock_core 9346 1 omap_hwspinlock
  423. Release # 8
  424. Probe # 9
  425. Module Size Used by Not tainted
  426. omap_hwspinlock 2500 0
  427. hwspinlock_core 9346 1 omap_hwspinlock
  428. Release # 9
  429. Probe # 10
  430. Module Size Used by Not tainted
  431. omap_hwspinlock 2500 0
  432. hwspinlock_core 9346 1 omap_hwspinlock
  433. Release # 10
  434. Probe # 11
  435. Module Size Used by Not tainted
  436. omap_hwspinlock 2500 0
  437. hwspinlock_core 9346 1 omap_hwspinlock
  438. Release # 11
  439. Probe # 12
  440. Module Size Used by Not tainted
  441. omap_hwspinlock 2500 0
  442. hwspinlock_core 9346 1 omap_hwspinlock
  443. Release # 12
  444. Probe # 13
  445. Module Size Used by Not tainted
  446. omap_hwspinlock 2500 0
  447. hwspinlock_core 9346 1 omap_hwspinlock
  448. Release # 13
  449. Probe # 14
  450. Module Size Used by Not tainted
  451. omap_hwspinlock 2500 0
  452. hwspinlock_core 9346 1 omap_hwspinlock
  453. Release # 14
  454. Probe # 15
  455. Module Size Used by Not tainted
  456. omap_hwspinlock 2500 0
  457. hwspinlock_core 9346 1 omap_hwspinlock
  458. Release # 15
  459. Probe # 16
  460. Module Size Used by Not tainted
  461. omap_hwspinlock 2500 0
  462. hwspinlock_core 9346 1 omap_hwspinlock
  463. Release # 16
  464. Probe # 17
  465. Module Size Used by Not tainted
  466. omap_hwspinlock 2500 0
  467. hwspinlock_core 9346 1 omap_hwspinlock
  468. Release # 17
  469. Probe # 18
  470. Module Size Used by Not tainted
  471. omap_hwspinlock 2500 0
  472. hwspinlock_core 9346 1 omap_hwspinlock
  473. Release # 18
  474. Probe # 19
  475. Module Size Used by Not tainted
  476. omap_hwspinlock 2500 0
  477. hwspinlock_core 9346 1 omap_hwspinlock
  478. Release # 19
  479. Probe # 20
  480. Module Size Used by Not tainted
  481. omap_hwspinlock 2500 0
  482. hwspinlock_core 9346 1 omap_hwspinlock
  483. Release # 20
  484. Probe # 21
  485. Module Size Used by Not tainted
  486. omap_hwspinlock 2500 0
  487. hwspinlock_core 9346 1 omap_hwspinlock
  488. Release # 21
  489. Probe # 22
  490. Module Size Used by Not tainted
  491. omap_hwspinlock 2500 0
  492. hwspinlock_core 9346 1 omap_hwspinlock
  493. Release # 22
  494. Probe # 23
  495. Module Size Used by Not tainted
  496. omap_hwspinlock 2500 0
  497. hwspinlock_core 9346 1 omap_hwspinlock
  498. Release # 23
  499. Probe # 24
  500. Module Size Used by Not tainted
  501. omap_hwspinlock 2500 0
  502. hwspinlock_core 9346 1 omap_hwspinlock
  503. Release # 24
  504. Probe # 25
  505. Module Size Used by Not tainted
  506. omap_hwspinlock 2500 0
  507. hwspinlock_core 9346 1 omap_hwspinlock
  508. Release # 25
  509. Probe # 26
  510. Module Size Used by Not tainted
  511. omap_hwspinlock 2500 0
  512. hwspinlock_core 9346 1 omap_hwspinlock
  513. Release # 26
  514. Probe # 27
  515. Module Size Used by Not tainted
  516. omap_hwspinlock 2500 0
  517. hwspinlock_core 9346 1 omap_hwspinlock
  518. Release # 27
  519. Probe # 28
  520. Module Size Used by Not tainted
  521. omap_hwspinlock 2500 0
  522. hwspinlock_core 9346 1 omap_hwspinlock
  523. Release # 28
  524. Probe # 29
  525. Module Size Used by Not tainted
  526. omap_hwspinlock 2500 0
  527. hwspinlock_core 9346 1 omap_hwspinlock
  528. Release # 29
  529. Probe # 30
  530. Module Size Used by Not tainted
  531. omap_hwspinlock 2500 0
  532. hwspinlock_core 9346 1 omap_hwspinlock
  533. Release # 30
  534. Probe # 31
  535. Module Size Used by Not tainted
  536. omap_hwspinlock 2500 0
  537. hwspinlock_core 9346 1 omap_hwspinlock
  538. Release # 31
  539. Probe # 32
  540. Module Size Used by Not tainted
  541. omap_hwspinlock 2500 0
  542. hwspinlock_core 9346 1 omap_hwspinlock
  543. Release # 32
  544. Probe # 33
  545. Module Size Used by Not tainted
  546. omap_hwspinlock 2500 0
  547. hwspinlock_core 9346 1 omap_hwspinlock
  548. Release # 33
  549. Probe # 34
  550. Module Size Used by Not tainted
  551. omap_hwspinlock 2500 0
  552. hwspinlock_core 9346 1 omap_hwspinlock
  553. Release # 34
  554. Probe # 35
  555. Module Size Used by Not tainted
  556. omap_hwspinlock 2500 0
  557. hwspinlock_core 9346 1 omap_hwspinlock
  558. Release # 35
  559. Probe # 36
  560. Module Size Used by Not tainted
  561. omap_hwspinlock 2500 0
  562. hwspinlock_core 9346 1 omap_hwspinlock
  563. Release # 36
  564. Probe # 37
  565. Module Size Used by Not tainted
  566. omap_hwspinlock 2500 0
  567. hwspinlock_core 9346 1 omap_hwspinlock
  568. Release # 37
  569. Probe # 38
  570. Module Size Used by Not tainted
  571. omap_hwspinlock 2500 0
  572. hwspinlock_core 9346 1 omap_hwspinlock
  573. Release # 38
  574. Probe # 39
  575. Module Size Used by Not tainted
  576. omap_hwspinlock 2500 0
  577. hwspinlock_core 9346 1 omap_hwspinlock
  578. Release # 39
  579. Probe # 40
  580. Module Size Used by Not tainted
  581. omap_hwspinlock 2500 0
  582. hwspinlock_core 9346 1 omap_hwspinlock
  583. Release # 40
  584. Probe # 41
  585. Module Size Used by Not tainted
  586. omap_hwspinlock 2500 0
  587. hwspinlock_core 9346 1 omap_hwspinlock
  588. Release # 41
  589. Probe # 42
  590. Module Size Used by Not tainted
  591. omap_hwspinlock 2500 0
  592. hwspinlock_core 9346 1 omap_hwspinlock
  593. Release # 42
  594. Probe # 43
  595. Module Size Used by Not tainted
  596. omap_hwspinlock 2500 0
  597. hwspinlock_core 9346 1 omap_hwspinlock
  598. Release # 43
  599. Probe # 44
  600. Module Size Used by Not tainted
  601. omap_hwspinlock 2500 0
  602. hwspinlock_core 9346 1 omap_hwspinlock
  603. Release # 44
  604. Probe # 45
  605. Module Size Used by Not tainted
  606. omap_hwspinlock 2500 0
  607. hwspinlock_core 9346 1 omap_hwspinlock
  608. Release # 45
  609. Probe # 46
  610. Module Size Used by Not tainted
  611. omap_hwspinlock 2500 0
  612. hwspinlock_core 9346 1 omap_hwspinlock
  613. Release # 46
  614. Probe # 47
  615. Module Size Used by Not tainted
  616. omap_hwspinlock 2500 0
  617. hwspinlock_core 9346 1 omap_hwspinlock
  618. Release # 47
  619. Probe # 48
  620. Module Size Used by Not tainted
  621. omap_hwspinlock 2500 0
  622. hwspinlock_core 9346 1 omap_hwspinlock
  623. Release # 48
  624. Probe # 49
  625. Module Size Used by Not tainted
  626. omap_hwspinlock 2500 0
  627. hwspinlock_core 9346 1 omap_hwspinlock
  628. Release # 49
  629. Probe # 50
  630. Module Size Used by Not tainted
  631. omap_hwspinlock 2500 0
  632. hwspinlock_core 9346 1 omap_hwspinlock
  633. Release # 50
  634. / #
  635. / # cd /rp/ # cd /rpmsg/
  636. /rpmsg # insmod hw/rpmsg # insmod hwspinlock_core_olsmod
  637. Module Size Used by Not tainted
  638. /rpmsg # insmod hw/rpmsg # insmod hwspinlock_core/./rpmsg # insmod hwspinlock_core.ko
  639. /rpmsg # insmod om/rpmsg # insmod omap_hw/rpmsg # insmod omap_hwspinlock./rpmsg # insmod omap_hwspinlock.ko
  640. /rpmsg # insmod hw/rpmsg # insmod hwspinlock_coreomap/rpmsg # insmod omap_hw/rpmsg # insmod omap_hwspinlock_te/rpmsg # insmod omap_hwspinlock_test.ko
  641. [ 81.415496]
  642. [ 81.415496] ***** Begin - Test All pHandle Locks ****
  643. [ 81.422485] Number of phandles = 2
  644. [ 81.426483]
  645. [ 81.426483] Testing lock 3
  646. [ 81.426483] trylock #1 status[0] = 0
  647. [ 81.435058] trylock #2 status[0] = -16
  648. [ 81.439025] trylock after unlock status[0] = 0
  649. [ 81.439025] trylock #1 status[1] = 0
  650. [ 81.447540] trylock #2 status[1] = -16
  651. [ 81.447540] trylock after unlock status[1] = 0
  652. [ 81.455505]
  653. [ 81.455505] Testing lock 9
  654. [ 81.461212] trylock #1 status[0] = 0
  655. [ 81.463470] trylock #2 status[0] = -16
  656. [ 81.468963] trylock after unlock status[0] = 0
  657. [ 81.473663] trylock #1 status[1] = 0
  658. [ 81.477416] trylock #2 status[1] = -16
  659. [ 81.481414] trylock after unlock status[1] = 0
  660. [ 81.486083]
  661. [ 81.486083] ***** End - Test All pHandle Locks ****
  662. [ 81.489654]
  663. [ 81.489654] ***** Begin - Test All Locks ****
  664. [ 81.498992]
  665. [ 81.498992] Testing lock 0
  666. [ 81.503417] trylock #1 status[0] = 0
  667. [ 81.507171] trylock #2 status[0] = -16
  668. [ 81.511138] trylock after unlock status[0] = 0
  669. [ 81.515899] trylock #1 status[1] = 0
  670. [ 81.515899] trylock #2 status[1] = -16
  671. [ 81.523620] trylock after unlock status[1] = 0
  672. [ 81.527435]
  673. [ 81.527435] Testing lock 1
  674. [ 81.532745] trylock #1 status[0] = 0
  675. [ 81.536529] trylock #2 status[0] = -16
  676. [ 81.540496] trylock after unlock status[0] = 0
  677. [ 81.545196] trylock #1 status[1] = 0
  678. [ 81.548980] trylock #2 status[1] = -16
  679. [ 81.548980] trylock after unlock status[1] = 0
  680. [ 81.557617]
  681. [ 81.557617] Testing lock 2
  682. [ 81.562042] trylock #1 status[0] = 0
  683. [ 81.565856] trylock #2 status[0] = -16
  684. [ 81.569824] trylock after unlock status[0] = 0
  685. [ 81.574523] trylock #1 status[1] = 0
  686. [ 81.578308] trylock #2 status[1] = -16
  687. [ 81.578308] trylock after unlock status[1] = 0
  688. [ 81.585632]
  689. [ 81.585632] Testing lock 3
  690. [ 81.591400] trylock #1 status[0] = 0
  691. [ 81.591400] trylock #2 status[0] = -16
  692. [ 81.599151] trylock after unlock status[0] = 0
  693. [ 81.599639] trylock #1 status[1] = 0
  694. [ 81.607635] trylock #2 status[1] = -16
  695. [ 81.611602] trylock after unlock status[1] = 0
  696. [ 81.616302]
  697. [ 81.616302] Testing lock 4
  698. [ 81.616302] trylock #1 status[0] = 0
  699. [ 81.624511] trylock #2 status[0] = -16
  700. [ 81.628479] trylock after unlock status[0] = 0
  701. [ 81.633178] trylock #1 status[1] = 0
  702. [ 81.636962] trylock #2 status[1] = -16
  703. [ 81.640930] trylock after unlock status[1] = 0
  704. [ 81.645629]
  705. [ 81.645629] Testing lock 5
  706. [ 81.645629] trylock #1 status[0] = 0
  707. [ 81.653839] trylock #2 status[0] = -16
  708. [ 81.657836] trylock after unlock status[0] = 0
  709. [ 81.657836] trylock #1 status[1] = 0
  710. [ 81.666290] trylock #2 status[1] = -16
  711. [ 81.666290] trylock after unlock status[1] = 0
  712. [ 81.674957]
  713. [ 81.674957] Testing lock 6
  714. [ 81.679382] trylock #1 status[0] = 0
  715. [ 81.679412] trylock #2 status[0] = -16
  716. [ 81.687133] trylock after unlock status[0] = 0
  717. [ 81.691833] trylock #1 status[1] = 0
  718. [ 81.695617] trylock #2 status[1] = -16
  719. [ 81.695709] trylock after unlock status[1] = 0
  720. [ 81.704284]
  721. [ 81.704284] Testing lock 7
  722. [ 81.708709] trylock #1 status[0] = 0
  723. [ 81.708740] trylock #2 status[0] = -16
  724. [ 81.716461] trylock after unlock status[0] = 0
  725. [ 81.716461] trylock #1 status[1] = 0
  726. [ 81.724945] trylock #2 status[1] = -16
  727. [ 81.728912] trylock after unlock status[1] = 0
  728. [ 81.728942]
  729. [ 81.728942] Testing lock 8
  730. [ 81.738067] trylock #1 status[0] = 0
  731. [ 81.738067] trylock #2 status[0] = -16
  732. [ 81.745819] trylock after unlock status[0] = 0
  733. [ 81.750518] trylock #1 status[1] = 0
  734. [ 81.750518] trylock #2 status[1] = -16
  735. [ 81.758239] trylock after unlock status[1] = 0
  736. [ 81.762939]
  737. [ 81.762939] Testing lock 9
  738. [ 81.767395] trylock #1 status[0] = 0
  739. [ 81.768218] trylock #2 status[0] = -16
  740. [ 81.775115] trylock after unlock status[0] = 0
  741. [ 81.779815] trylock #1 status[1] = 0
  742. [ 81.779815] trylock #2 status[1] = -16
  743. [ 81.787567] trylock after unlock status[1] = 0
  744. [ 81.792266]
  745. [ 81.792266] Testing lock 10
  746. [ 81.796783] trylock #1 status[0] = 0
  747. [ 81.800567] trylock #2 status[0] = -16
  748. [ 81.800567] trylock after unlock status[0] = 0
  749. [ 81.809234] trylock #1 status[1] = 0
  750. [ 81.809234] trylock #2 status[1] = -16
  751. [ 81.816986] trylock after unlock status[1] = 0
  752. [ 81.816986]
  753. [ 81.816986] Testing lock 11
  754. [ 81.826202] trylock #1 status[0] = 0
  755. [ 81.826202] trylock #2 status[0] = -16
  756. [ 81.833923] trylock after unlock status[0] = 0
  757. [ 81.838623] trylock #1 status[1] = 0
  758. [ 81.838653] trylock #2 status[1] = -16
  759. [ 81.846374] trylock after unlock status[1] = 0
  760. [ 81.851074]
  761. [ 81.851074] Testing lock 12
  762. [ 81.855590] trylock #1 status[0] = 0
  763. [ 81.855682] trylock #2 status[0] = -16
  764. [ 81.855682] trylock after unlock status[0] = 0
  765. [ 81.868041] trylock #1 status[1] = 0
  766. [ 81.868041] trylock #2 status[1] = -16
  767. [ 81.875762] trylock after unlock status[1] = 0
  768. [ 81.875762]
  769. [ 81.875762] Testing lock 13
  770. [ 81.884979] trylock #1 status[0] = 0
  771. [ 81.888763] trylock #2 status[0] = -16
  772. [ 81.892730] trylock after unlock status[0] = 0
  773. [ 81.897430] trylock #1 status[1] = 0
  774. [ 81.901214] trylock #2 status[1] = -16
  775. [ 81.901214] trylock after unlock status[1] = 0
  776. [ 81.909881]
  777. [ 81.909881] Testing lock 14
  778. [ 81.914398] trylock #1 status[0] = 0
  779. [ 81.918182] trylock #2 status[0] = -16
  780. [ 81.918182] trylock after unlock status[0] = 0
  781. [ 81.926849] trylock #1 status[1] = 0
  782. [ 81.926849] trylock #2 status[1] = -16
  783. [ 81.934570] trylock after unlock status[1] = 0
  784. [ 81.939239]
  785. [ 81.939239] Testing lock 15
  786. [ 81.943786] trylock #1 status[0] = 0
  787. [ 81.947570] trylock #2 status[0] = -16
  788. [ 81.951538] trylock after unlock status[0] = 0
  789. [ 81.956237] trylock #1 status[1] = 0
  790. [ 81.959594] trylock #2 status[1] = -16
  791. [ 81.963989] trylock after unlock status[1] = 0
  792. [ 81.968688]
  793. [ 81.968688] Testing lock 16
  794. [ 81.973205] trylock #1 status[0] = 0
  795. [ 81.976989] trylock #2 status[0] = -16
  796. [ 81.980957] trylock after unlock status[0] = 0
  797. [ 81.985687] trylock #1 status[1] = 0
  798. [ 81.985687] trylock #2 status[1] = -16
  799. [ 81.993408] trylock after unlock status[1] = 0
  800. [ 81.998107]
  801. [ 81.998107] Testing lock 17
  802. [ 82.002624] trylock #1 status[0] = 0
  803. [ 82.006439] trylock #2 status[0] = -16
  804. [ 82.006439] trylock after unlock status[0] = 0
  805. [ 82.015075] trylock #1 status[1] = 0
  806. [ 82.018859] trylock #2 status[1] = -16
  807. [ 82.022827] trylock after unlock status[1] = 0
  808. [ 82.027526]
  809. [ 82.027526] Testing lock 18
  810. [ 82.032043] trylock #1 status[0] = 0
  811. [ 82.032043] trylock #2 status[0] = -16
  812. [ 82.039794] trylock after unlock status[0] = 0
  813. [ 82.044525] trylock #1 status[1] = 0
  814. [ 82.048309] trylock #2 status[1] = -16
  815. [ 82.048309] trylock after unlock status[1] = 0
  816. [ 82.056976]
  817. [ 82.056976] Testing lock 19
  818. [ 82.061492] trylock #1 status[0] = 0
  819. [ 82.061492] trylock #2 status[0] = -16
  820. [ 82.065521] trylock after unlock status[0] = 0
  821. [ 82.073944] trylock #1 status[1] = 0
  822. [ 82.077728] trylock #2 status[1] = -16
  823. [ 82.081695] trylock after unlock status[1] = 0
  824. [ 82.086364]
  825. [ 82.086364] Testing lock 20
  826. [ 82.090911] trylock #1 status[0] = 0
  827. [ 82.090911] trylock #2 status[0] = -16
  828. [ 82.098663] trylock after unlock status[0] = 0
  829. [ 82.098663] trylock #1 status[1] = 0
  830. [ 82.105682] trylock #2 status[1] = -16
  831. [ 82.105682] trylock after unlock status[1] = 0
  832. [ 82.115783]
  833. [ 82.115783] Testing lock 21
  834. [ 82.120300] trylock #1 status[0] = 0
  835. [ 82.124084] trylock #2 status[0] = -16
  836. [ 82.128051] trylock after unlock status[0] = 0
  837. [ 82.132751] trylock #1 status[1] = 0
  838. [ 82.136535] trylock #2 status[1] = -16
  839. [ 82.140502] trylock after unlock status[1] = 0
  840. [ 82.140502]
  841. [ 82.140502] Testing lock 22
  842. [ 82.149719] trylock #1 status[0] = 0
  843. [ 82.149719] trylock #2 status[0] = -16
  844. [ 82.157470] trylock after unlock status[0] = 0
  845. [ 82.157470] trylock #1 status[1] = 0
  846. [ 82.165954] trylock #2 status[1] = -16
  847. [ 82.165954] trylock after unlock status[1] = 0
  848. [ 82.165954]
  849. [ 82.165954] Testing lock 23
  850. [ 82.179138] trylock #1 status[0] = 0
  851. [ 82.179138] trylock #2 status[0] = -16
  852. [ 82.185485] trylock after unlock status[0] = 0
  853. [ 82.191589] trylock #1 status[1] = 0
  854. [ 82.191955] trylock #2 status[1] = -16
  855. [ 82.199310] trylock after unlock status[1] = 0
  856. [ 82.199340]
  857. [ 82.199340] Testing lock 24
  858. [ 82.205505] trylock #1 status[0] = 0
  859. [ 82.212341] trylock #2 status[0] = -16
  860. [ 82.216308] trylock after unlock status[0] = 0
  861. [ 82.221008] trylock #1 status[1] = 0
  862. [ 82.221008] trylock #2 status[1] = -16
  863. [ 82.228729] trylock after unlock status[1] = 0
  864. [ 82.228729]
  865. [ 82.228729] Testing lock 25
  866. [ 82.237945] trylock #1 status[0] = 0
  867. [ 82.237976] trylock #2 status[0] = -16
  868. [ 82.245697] trylock after unlock status[0] = 0
  869. [ 82.245697] trylock #1 status[1] = 0
  870. [ 82.254180] trylock #2 status[1] = -16
  871. [ 82.258148] trylock after unlock status[1] = 0
  872. [ 82.262847]
  873. [ 82.262847] Testing lock 26
  874. [ 82.267364] trylock #1 status[0] = 0
  875. [ 82.271148] trylock #2 status[0] = -16
  876. [ 82.275115] trylock after unlock status[0] = 0
  877. [ 82.279815] trylock #1 status[1] = 0
  878. [ 82.279815] trylock #2 status[1] = -16
  879. [ 82.287567] trylock after unlock status[1] = 0
  880. [ 82.287567]
  881. [ 82.287567] Testing lock 27
  882. [ 82.296783] trylock #1 status[0] = 0
  883. [ 82.296783] trylock #2 status[0] = -16
  884. [ 82.304504] trylock after unlock status[0] = 0
  885. [ 82.309204] trylock #1 status[1] = 0
  886. [ 82.312988] trylock #2 status[1] = -16
  887. [ 82.316955] trylock after unlock status[1] = 0
  888. [ 82.318145]
  889. [ 82.318145] Testing lock 28
  890. [ 82.325744] trylock #1 status[0] = 0
  891. [ 82.329956] trylock #2 status[0] = -16
  892. [ 82.333923] trylock after unlock status[0] = 0
  893. [ 82.338623] trylock #1 status[1] = 0
  894. [ 82.338623] trylock #2 status[1] = -16
  895. [ 82.346343] trylock after unlock status[1] = 0
  896. [ 82.351043]
  897. [ 82.351043] Testing lock 29
  898. [ 82.355590] trylock #1 status[0] = 0
  899. [ 82.359374] trylock #2 status[0] = -16
  900. [ 82.359374] trylock after unlock status[0] = 0
  901. [ 82.368011] trylock #1 status[1] = 0
  902. [ 82.371795] trylock #2 status[1] = -16
  903. [ 82.375762] trylock after unlock status[1] = 0
  904. [ 82.380462]
  905. [ 82.380462] Testing lock 30
  906. [ 82.380462] trylock #1 status[0] = 0
  907. [ 82.388763] trylock #2 status[0] = -16
  908. [ 82.388763] trylock after unlock status[0] = 0
  909. [ 82.397399] trylock #1 status[1] = 0
  910. [ 82.401184] trylock #2 status[1] = -16
  911. [ 82.405151] trylock after unlock status[1] = 0
  912. [ 82.409820]
  913. [ 82.409820] Testing lock 31
  914. [ 82.409881] trylock #1 status[0] = 0
  915. [ 82.418151] trylock #2 status[0] = -16
  916. [ 82.422119] trylock after unlock status[0] = 0
  917. [ 82.426818] trylock #1 status[1] = 0
  918. [ 82.430603] trylock #2 status[1] = -16
  919. [ 82.434570] trylock after unlock status[1] = 0
  920. [ 82.439270]
  921. [ 82.439270] ***** End - Test All Locks ****
  922. /rpmsg #
  923. /rpmsg # lsmod
  924. Module Size Used by Not tainted
  925. omap_hwspinlock_test 4118 0
  926. omap_hwspinlock 2500 0
  927. hwspinlock_core 9346 2 omap_hwspinlock_test,omap_hwspinlock
  928. /rpmsg # rmmod om/rpmsg # rmmod omap_hw/rpmsg # rmmod omap_hwspinlock_te/rpmsg # rmmod omap_hwspinlock_test.ko
  929. /rpmsg # rmmod om/rpmsg # rmmod omap_hw/rpmsg # rmmod omap_hwspinlock
  930. /rpmsg # rmmod hw/rpmsg # rmmod hwspinlock_core
  931. /rpmsg #
  932. /rpmsg #

OMAP4 HwSpinlock Test Log against v3.13-rc8