- device "test4" 4 4
- warmboot = on
- logic_tile 1 2 {
- lutff_6 {
- lut[6].out -> BEL_LT-LUT4[6].out
- lut[6].out -> BEL_LT-LUT4[6].out -> BEL_LT-LUT4[7].in[2]
- BLK_TL-PLB.i_sp4_r_v_b[15] -> BEL_LT-LUT4[6].in[3]
- BLK_TL-PLB.i_neigh_op_lft[7] -> BEL_LT-LUT4[6].in[2]
- BLK_TL-PLB.i_sp4_r_v_b[26] -> BEL_LT-LUT4[6].in[0]
- BLK_TL-PLB.i_neigh_op_tnl[2] -> BEL_LT-LUT4[6].in[1]
- }
- lutff_7 {
- BLK_TL-PLB.i_neigh_op_tnl[3] -> BEL_LT-LUT4[7].in[1]
- lut[7].out -> BEL_LT-LUT4[7].out
- BLK_TL-PLB.i_sp4_r_v_b[20] -> BEL_LT-LUT4[7].in[0]
- lut[6].out -> BEL_LT-LUT4[6].out -> BEL_LT-LUT4[7].in[2]
- lut[7].out -> BEL_LT-LUT4[7].out -> BLK_TL-PLB.o_sp4_v_b[30]
- BLK_TL-PLB.i_neigh_op_tnl[4] -> BEL_LT-LUT4[7].in[3]
- }
- }
- io_tile 0 2 {
- io_-1 {
- BLK_BB-VPR_PAD.outpad -> PAD_OT-OUTPUT.outpad
- }
- }
- io_tile 1 0 {
- io_-1 {
- PAD_IN-INPUT.inpad -> BLK_BB-VPR_PAD.inpad
- }
- }
- io_tile 2 0 {
- io_-1 {
- PAD_IN-INPUT.inpad -> BLK_BB-VPR_PAD.inpad
- }
- }
- io_tile 2 3 {
- io_-1 {
- PAD_IN-INPUT.inpad -> BLK_BB-VPR_PAD.inpad
- }
- }
- io_tile 0 1 {
- io_-1 {
- PAD_IN-INPUT.inpad -> BLK_BB-VPR_PAD.inpad
- }
- }
- io_tile 1 3 {
- io_-1 {
- PAD_IN-INPUT.inpad -> BLK_BB-VPR_PAD.inpad
- }
- }
- io_tile 3 1 {
- io_-1 {
- PAD_IN-INPUT.inpad -> BLK_BB-VPR_PAD.inpad
- }
- }
- io_tile 3 2 {
- io_-1 {
- PAD_IN-INPUT.inpad -> BLK_BB-VPR_PAD.inpad
- }
- }